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Note: The different BOOTSZ Fuse configurations are shown in Figure 102.
Table 83. Read-While-Write Limit
Section |
Pages |
Address |
Read-While-Write section (RWW) |
96 |
0x000 - 0xBFF |
No Read-While-Write section (NRWW) |
32 |
0xC00 - 0xFFF |
For details about these two section, see “NRWW – No Read-While-Write Section” on page 207 and “RWW – Read-While-Write Section” on page 207
Table 84. Explanation of Different Variables used in Figure 103 and the Mapping to the
Z-pointer
Corresponding |
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Variable |
Z-value(1) |
Description |
||
PCMSB |
11 |
Most significant bit in the Program Counter. |
||
(The Program Counter is 12 bits PC[11:0]) |
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PAGEMSB |
4 |
Most significant bit which is used to address the |
||
words within one page (32 words in a page |
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requires 5 bits PC [4:0]). |
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ZPCMSB |
Z12 |
Bit in Z-register that is mapped to PCMSB. |
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Because Z0 is not used, the ZPCMSB equals |
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PCMSB + 1. |
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ZPAGEMSB |
Z5 |
Bit in Z-register that is mapped to PAGEMSB. |
||
Because Z0 is not used, the ZPAGEMSB |
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equals PAGEMSB + 1. |
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PCPAGE |
PC[11:5] |
Z12:Z6 |
Program counter page address: Page select, |
|
for page erase and page write |
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PCWORD |
PC[4:0] |
Z5:Z1 |
Program counter word address: Word select, for |
|
filling temporary buffer (must be zero during |
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page write operation) |
||||
Note: 1. |
Z15:Z13: always ignored |
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Z0: should be zero for all SPM commands, byte select for the LPM instruction. |
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See “Addressing the Flash During Self-Programming” on page 211 for details about |
||||
the use of Z-pointer during Self-Programming. |
||||
218 ATmega8(L)
2486O–AVR–10/04
Table 86. Lock Bit Protection Modes(2) (Continued)
Memory Lock Bits |
Protection Type |
||||
1 |
1 |
1 |
No restrictions for SPM or LPM accessing the Boot Loader |
||
section. |
|||||
2 |
1 |
0 |
SPM is not allowed to write to the Boot Loader section. |
||
SPM is not allowed to write to the Boot Loader section, |
|||||
and LPM executing from the Application section is not |
|||||
3 |
0 |
0 |
allowed to read from the Boot Loader section. If Interrupt |
||
Vectors are placed in the Application section, interrupts |
|||||
are disabled while executing from the Boot Loader section. |
|||||
LPM executing from the Application section is not allowed |
|||||
4 |
0 |
1 |
to read from the Boot Loader section. If Interrupt Vectors |
||
are placed in the Application section, interrupts are |
|||||
disabled while executing from the Boot Loader section. |
|||||
Notes: 1. Program the Fuse Bits before programming the Lock Bits. |
|||||
2. “1” means unprogrammed, “0” means programmed |
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Fuse Bits |
The ATmega8 has two fuse bytes. Table 87 and Table 88 describe briefly the functional- |
||||
ity of all the fuses and how they are mapped into the fuse bytes. Note that the fuses are |
|||||
read as logical zero, “0”, if they are programmed. |
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Table 87. Fuse High Byte |
|||||
Fuse High |
Bit |
||||
Byte |
No. |
Description |
Default Value |
||
RSTDISBL(4) |
7 |
1 |
(unprogrammed, PC6 is |
||
Select if PC6 is I/O pin or RESET pin |
RESET-pin) |
||||
WDTON |
6 |
1 |
(unprogrammed, WDT |
||
WDT always on |
enabled by WDTCR) |
||||
SPIEN(1) |
5 |
Enable Serial Program and Data |
0 |
(programmed, SPI prog. |
|
Downloading |
enabled) |
||||
CKOPT(2) |
4 |
Oscillator options |
1 |
(unprogrammed) |
|
EESAVE |
3 |
EEPROM memory is preserved |
1 |
(unprogrammed, |
|
through the Chip Erase |
EEPROM not preserved) |
||||
BOOTSZ1 |
2 |
Select Boot Size (see Table 82 for |
(programmed)(3) |
||
details) |
0 |
||||
BOOTSZ0 |
1 |
Select Boot Size (see Table 82 for |
(programmed)(3) |
||
details) |
0 |
||||
BOOTRST |
0 |
Select Reset Vector |
1 |
(unprogrammed) |
|
Notes: 1. The SPIEN Fuse is not accessible in Serial Programming mode. |
|||||
2.The CKOPT Fuse functionality depends on the setting of the CKSEL bits, see “Clock Sources” on page 24 for details.
3.The default value of BOOTSZ1..0 results in maximum Boot Size. See Table 82 on page 217.
4.When programming the RSTDISBL Fuse Parallel Programming has to be used to change fuses or perform further programming.
220 ATmega8(L)
2486O–AVR–10/04
ATmega8(L) |
|||||||
Table 88. Fuse Low Byte |
|||||||
Fuse Low |
Bit |
||||||
Byte |
No. |
Description |
Default Value |
||||
BODLEVEL |
7 |
Brown out detector trigger level |
1 |
(unprogrammed) |
|||
BODEN |
6 |
Brown out detector enable |
1 |
(unprogrammed, BOD disabled) |
|||
SUT1 |
5 |
Select start-up time |
1 |
(unprogrammed)(1) |
|||
SUT0 |
4 |
Select start-up time |
0 |
(programmed)(1) |
|||
CKSEL3 |
3 |
Select Clock source |
0 |
(programmed)(2) |
|||
CKSEL2 |
2 |
Select Clock source |
0 |
(programmed)(2) |
|||
CKSEL1 |
1 |
Select Clock source |
0 |
(programmed)(2) |
|||
CKSEL0 |
0 |
Select Clock source |
1 |
(unprogrammed)(2) |
|||
Notes: 1. The default value of SUT1..0 results in maximum start-up time. SeeTable 10 on page 28 for details.
2.The default setting of CKSEL3..0 results in internal RC Oscillator @ 1MHz. See Table 2 on page 24 for details.
The status of the Fuse Bits is not affected by Chip Erase. Note that the Fuse Bits are locked if lock bit1 (LB1) is programmed. Program the Fuse Bits before programming the Lock Bits.
Latching of Fuses |
The fuse values are latched when the device enters Programming mode and changes of |
the fuse values will have no effect until the part leaves Programming mode. This does |
|
not apply to the EESAVE Fuse which will take effect once it is programmed. The fuses |
|
are also latched on Power-up in Normal mode. |
221
2486O–AVR–10/04