Файл: Beginers introduction to the Assebly Language of ATMEL-AVR Microprocessors (Gerhard Schmidt,2003, англ).pdf

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Port

Function

Port-Address

RAM-Address

TCNT0

Timer/Counter 0 count register

0x32

0x52

Port

Function

Port-Address

RAM-Address

TCCR1A

Timer/Counter 1 Control Register A

0x2F

0x4F

7

6

5

4

3

2

1

0

COM1A1

COM1A0

COM1B1

COM1B0

-

-

PWM11

PWM10

Bit

Name

Meaning

Opportunities

7

COM1A1

Compare Output A

00: OC1A/B not connected

6

COM1A0

01: OC1A/B changes polarity

10: OC1A/B to zero

5

COM1B1

Compare Output B

11: OC1A/B to one

4

COM1B0

3

(not used)

2

00: PWM off

1..0

PWM11

Pulse width modulator

01: 8-Bit PWM

PWM10

10: 9-Bit PWM

11: 10-Bit PWM

Port

Function

Port-Address

RAM-Address

TCCR1B

Timer/Counter 1 Control Register B

0x2E

0x4E

7

6

5

4

3

2

1

0

ICNC1

ICES1

-

-

CTC1

CS12

CS11

CS10

Bit

Name

Meaning

Opportunities

7

ICNC1

Noise Canceler

0: disabled, first edge starts sampling

on ICP-Pin

1: enabled, min four clock cycles

6

ICES1

Edge selection

0: falling edge triggers Capture

on Capture

1: rising edge triggers Capture

5..4

(not used)

3

CTC1

Clear at

1: Counter set to zero if equal

Compare Match A

000: Counter stopped

001: Clock

010: Clock / 8

2..0

CS12..CS10

Clock select

011: Clock / 64

100: Clock / 256

101: Clock / 1024

110: falling edge external Pin T1

111: rising edge external Pin T1

Port

Function

Port-Address

RAM-Address

TCNT1L/H

Timer/Counter 1 count register

0x2C/0x2D

0x4C/0x4D

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Port

Function

Port-Address

RAM-Address

OCR1AL/H

Timer/Counter 1 Output Compare register A

0x2A/0x2B

0x4A/0x4B hex

Port

Function

Port-Address

RAM-Address

OCR1BL/H

Timer/Counter 1 Output Compare register B

0x28/0x29

0x48/0x49

Port

Function

Port-Address

RAM-Address

ICR1L/H

Timer/Counter 1 Input Capture Register

0x24/0x25

0x44/0x45

Watchdog­Timer

Port

Function

Port-Address

RAM-Address

WDTCR

Watchdog Timer Control Register

0x21

0x41

7

6

5

4

3

2

1

0

-

-

-

WDTOE

WDE

WDP2

WDP1

WDP0

Bit

Name

Meaning

WDT-cycle at 5.0 Volt

7..5

(not used)

4

WDTOE

Watchdog Turnoff Enable

Previous set to

disabling of WDE required

3

WDE

Watchdog Enable

1: Watchdog aktive

000: 15 ms

001: 30 ms

010: 60 ms

2..0

WDP2..WDP0

Watchdog Timer Prescaler

011: 120 ms

100: 240 ms

101: 490 ms

110: 970 ms

111: 1,9 s

Port

Function

Port-Address

RAM-Address

EEARL/H

EEPROM Address Register

0x1E/0x1F

0x3E/0x3F

Port

Function

Port-Address

RAM-Address

EEDR

EEPROM Data Register

0x1D

0x3D

Port

Function

Port-Address

RAM-Address

EECR

EEPROM Control Register

0x1C

0x3C

7

6

5

4

3

2

1

0

-

-

-

-

-

EEMWE

EEWE

EERE

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Bit

Name

Meaning

Function

7..

(not used)

3

2

EEMWE

EEPROM Master Write Enable

Previous set enables write cycle

1

EEWE

EEPROM Write Enable

Set to initiate write

0

EERE

EEPROM Read Enable

Set initiates read

Port

Function

Port-Address

RAM-Address

SPCR

SPI Control Register

0x0D

0x2D

7

6

5

4

3

2

1

0

SPIE

SPE

DORD

MSTR

CPOL

CPHA

SPR1

SPR0

Bit

Name

Meaning

Function

7

SPIE

SPI Interrupt Enable

0: Interrupts disabled

1: Interrupts enabled

6

SPE

SPI Enable

0: SPI disabled

1: SPI enabled

5

DORD

Data Order

0: MSB first

1: LSB first

4

MSTR

Master/Slave Select

0: Slave

1: Master

3

CPOL

Clock Polarity

0: Positive Clock Phase

1: Negative Clock Phase

2

CPHA

Clock Phase

0: Sampling at beginning of Clock Phase

1: Sampling at end of Clock Phase

1

SPR1

00: Clock / 4

SCK clock frequency

01: Clock / 16

0

SPR0

10: Clock / 64

11: Clock / 128

Port

Function

Port-Address

RAM-Address

SPSR

SPI Status Register

0x0E

0x2E

7

6

5

4

3

2

1

0

SPIF

WCOL

-

-

-

-

-

-

Bit

Name

Meaning

Function

7

SPIF

SPI Interrupt Flag

Interrupt request

6

WCOL

Write Collision Flag

Write collission occured

5..0

(not used)