Файл: Real-time processing with the Philips LPC ARM mcu using GCC and uCOS II RTOS (D.W. Hawkins, 2006).pdf

ВУЗ: Не указан

Категория: Не указан

Дисциплина: Не указана

Добавлен: 15.06.2025

Просмотров: 483

Скачиваний: 2

ВНИМАНИЕ! Если данный файл нарушает Ваши авторские права, то обязательно сообщите нам.

AR1803

May 10, 2006

interrupt, then pends on a semaphore. The interrupt handler posts a semaphore (an I/O pin is toggled while in the ISR). The task receives the semaphore, sets an I/O pinlow, triggers an EINT0 interrupt, then pends on a semaphore. This sequence is repeated in a while loop.

Figure 13 shows the results of the task-to-ISR context switch testing for two ARM ports.

The time between the rising edge of the tasks LED to that of the ISR handler is 3.5µs for the AN-1011 port, and 2.7µs for the nested interrupts port (due to its use of load/store multiple instructions). The total task-to-ISR-to-task time is 13.0 andµs 11.7µs. Both ports can perform approximately 40,000 context switches per second.

4.2.2Test 2: Task-to-task context switching

Figure 12(b) shows the sequence of a task-to-task test. A test application was written containing two tasks, task A and task B. Task A posts semaphore A and then pends on semaphore B. Task B does the opposite, it pends on semaphore A, and posts semaphore B.

When Task A pends on semaphore B, it gives up the processor, and causes a task-level context switch to task B (task B is now ready, since task A posted the semaphore it was waiting for). The time between the rising-edge of the I/O pin toggled by task A, to the rising-edge of the I/O pin toggled by task B, is the time taken for a task-to-task context switch. Figure 14 shows the results of the task-to-task context switch testing for two ARM ports. The rising-edge to rising-edge time is about 13µ, and both square waves have a frequency of around 20kHz, i.e., around 40,000 context switches per second occur.

4.2.3Test 3: IRQ-FIQ interrupt nesting

Figure 15 demonstrates the IRQ nesting feature of the port presented in this document relative to the AN-1011 port. A task triggers an EINT1 IRQ interrupt which triggers a higher priority EINT0 FIQ interrupt. In Figure 15(a) the EINT1 handler finishes before the higher-priority EINT0 handler, as the AN-1011 port does not implement IRQ-FIQ interrupt nesting. However, in Figure 15(b) the EINT1 handler is interrupted by the EINT0 handler.

4.2.4Test 4: IRQ interrupt nesting

Figure 16 demonstrates the IRQ nesting feature of the port presented in this document relative to the AN-1011 port. A task triggers an EINT1 interrupt which triggers a higher priority EINT0 interrupt. In Figure 16(a) the EINT1 handler finishes before the higher-priority EINT0 handler, as the AN-1011 port does not implement interrupt nesting. However, in Figure 16(b) the EINT1 handler is interrupted by the EINT0 handler.

44

AR1803

May 10, 2006

(a)

(b)

Figure 13: µCOS-II ARM task-to-ISR context switch testing; (a) for AN-1011 port, and (b) the nested interrupts port.

45

AR1803

May 10, 2006

(a)

(b)

Figure 14: µCOS-II ARM task-to-task context switch testing; (a) for AN-1011 port, and (b) the nested interrupts port.

46

AR1803

May 10, 2006

(a)

(b)

Figure 15: µCOS-II ARM IRQ-FIQ nesting testing; a task triggers an EINT1 IRQ interrupt which triggers a higher priority EINT0 FIQ interrupt. The top trace is an I/O pulsed in the EINT1 handler, while the bottom trace is the EINT0 handler. Figure shows the waveform (a) for the AN-1011 port, and (b) for the nested interrupts port. Note that in (a) the EINT1 IRQ handler finishes before the higher-priority EINT0 FIQ handler, as the AN-1011 port does not implement IRQ-FIQ interrupt nesting.

47


AR1803

May 10, 2006

(a)

(b)

Figure 16: µCOS-II ARM IRQ nesting testing; a task triggers an EINT1 interrupt which triggers a higher priority EINT0 interrupt. The top trace is an I/O pulsed in the EINT1 handler, while the bottom trace is the EINT0 handler. Figure shows the waveform (a) for the AN-1011 port, and (b) for the nested interrupts port. Note that in (a) the EINT1 handler finishes before the higher-priority EINT0 handler, as the AN-1011 port does not implement interrupt nesting.

48

AR1803

May 10, 2006

4.3uCOS-II examples

4.3.1Example 1: Blinking LEDs

The µCOS-II example 1 program creates two tasks. Each task controls four LEDs. The first task rotates its four LEDs every 1s, while the second task rotates its LEDs every 250ms. The delays are implemented using OS delay functions.

4.3.2Example 2: Serial port echo console

The µCOS-II example 1 program creates a task that listens on a serial port and echos what is typed, and another task that blinks LEDs.

Download the program (eg. using FlashUtils), and connect to the other serial port on the board 115200-baud, and you will be greeted with the following message;

-----------------------------------

Welcome to uCOS-II!

-----------------------------------

This application will echo characters received. When a line of text is received on the serial port,

one of four LEDs (LED[0:3]) is blinked on the MCB2130.

A second task rotates the other four LEDs (LED[4:7]) every 250ms.

uCOS-II>

The serial port driver included with the example is interrupt driven and uses the µCOS-II OS to cause the task controlling the serial port to block appropriately.

I’d like to explain in mode detail, but I have simply run out of time, its now time to upload this entry!

49

AR1803

May 10, 2006

A ARM GCC

The GNUARM web site www.gnuarm.com contains pre-built binaries of the GCC compiler for ARM systems. The tools used at the time of writing of this document consisted of;

binutils-2.15.tar.bz2

newlib-1.12.0.tar.gz

gcc-3.4.3.tar.bz2

insight-6.1.tar.gz

The GNUARM binary tools can be used directly, or you can build them via the following instructions. Building the tools yourself is useful if you also want to build for other CPU architectures.

A.1 Build procedure

The tools in this section were built in July 2005 under Cygwin on a Windows 2000 machine, and under Linux on a Red Hat 9.0 machine. Cygwin used gcc 3.4.4, while Linux used the default Red Hat gcc 3.2.2. The machine was a dual-boot HP Omnibook 6100 laptop (1GHz Pentium III-M with 512MB RAM).

Building binutils under Cygwin and Linux (bash shell syntax):

1.export TARGET=arm-elf

2.export PREFIX=/opt/gnutools

3.tar -jxvf binutils-2.15.tar.bz2

4.mkdir binutils-build; cd binutils-build

5. ../binutils-2.15/configure --target=$TARGET --prefix=$PREFIX --enable-interwork --enable-multilib

6.make

7.make install (requires logging in as root under Linux)

Note: the first time I attempted to build binutils under Cygwin, it failed, as it could not find lex. So, be prepared to update and add tools to your Cygwin installation.

Building gcc and newlib under Cygwin and Linux:

1.export TARGET=arm-elf

2.export PREFIX=/opt/gnutools

3.export PATH=$PREFIX/bin:$PATH

4.tar -jxvf gcc-3.4.3.tar.bz2

5.tar -zxvf newlib-1.12.0.tar.gz

6.cp t-arm-elf gcc-3.4.3/gcc/config/arm/

(this updated file is from the GNUARM site and sets up the multilib build)

50


AR1803

May 10, 2006

7. mkdir gcc-build; mkdir newlib-build; cd gcc-build

8. ../gcc-3.4.3/configure --target=$TARGET --prefix=$PREFIX --enable-interwork --enable-multilib --with-float=soft --enable-languages=c,c++ --with-newlib --with-headers=../newlib-1.12.0/newlib/libc/include

Note: this step requires root privileges under Linux to copy the newlib headers into a subdirectory under $PREFIX.

9.make all-gcc

10.make install-gcc

11.cd ../newlib-build

12. ../newlib-1.12.0/configure --target=$TARGET --prefix=$PREFIX --enable-interwork --enable-multilib

13.make

14.make install

15.cd ../gcc-build

16.make

17.make install

Note that the configure options for gcc used here are slightly di erent than those stated on the GNUARM web site. If you install the GNUARM tools, and look in the arm-elf-gccbug script, it contains the configure command line used to build those tools;

arm-elf-gccbug(349): configured with:

../gcc-3.4.3/configure --target=arm-elf --prefix=/c/gnuarm-3.4.3 --enable-interwork --enable-multilib --with-float=soft --with-newlib --with-headers=../newlib-1.12.0/newlib/libc/include --enable-languages=c,c++,java --disable-libgcj

So relative to the build instruction on the GNUARM web site, the GNUARM tools need the option --with-float=soft, and the binary version of the tools also have Java enabled.

Building insight (which includes gdb) under Cygwin and Linux:

1.export TARGET=arm-elf

2.export PREFIX=/opt/gnutools

3.tar -jxvf insight-6.1.tar.gz

4.mkdir insight-build; cd insight-build

5. ../insight-6.1/configure --target=$TARGET --prefix=$PREFIX --enable-interwork --enable-multilib

6.make

7.make install

51

AR1803

May 10, 2006

The build failed under Cygwin. The errors were related to linker errors in newlib-6.1/tcl/win/tclWin32Dll.c and several other files in that Windows-specific directory. The problem might be that gcc 3.4.4 is optimizing away functions that are only referred to inside inline assembler (and hence the compiler believes they are unused). The problem was not investigated, since a binary version was available, and it worked fine under Linux.

What is a multilib?

Multilib enables the building of the di erent libraries required to link against code compiled with di erent command lines options. For example, processors without a floating-point unit (FPU) require the --with-float=soft option to trigger the use of software-implemented floating-point, whereas a processor with an FPU can use floating-point hardware instructions. The multilibs compiled can be printed using arm-elf-gcc -print-multi-lib (Reference: p37 configure.pdf from GNUARM web site).

For the GNUARM binary installation, the multilibs are;

$ /gnuarm/bin/arm-elf-gcc -print-multi-lib

.;

thumb;@mthumb be;@mbig-endian fpu;@mhard-float interwork;@mthumb-interwork nofmult;@mcpu=arm7

fpu/interwork;@mhard-float@mthumb-interwork fpu/nofmult;@mhard-float@mcpu=arm7 be/fpu;@mbig-endian@mhard-float be/interwork;@mbig-endian@mthumb-interwork be/nofmult;@mbig-endian@mcpu=arm7 be/fpu/interwork;@mbig-endian@mhard-float@mthumb-interwork be/fpu/nofmult;@mbig-endian@mhard-float@mcpu=arm7 thumb/be;@mthumb@mbig-endian thumb/interwork;@mthumb@mthumb-interwork thumb/be/interwork;@mthumb@mbig-endian@mthumb-interwork

If you built gcc and newlib without copying the altered t-arm-elf file into the gcc source, then the build occurs relatively quickly, and the multilibs are;

$ /opt/gnutools/bin/arm-elf-gcc -print-multi-lib

.;

thumb;@mthumb

i.e., there are no big-endian, interwork, or hardware floating-point multilibs. Copying the t-arm-elf file into the gcc source, gives the same multilib output as the GNUARM binary.

52


AR1803

May 10, 2006

References

[1]ARM. ARM7TDMI-S Technical Reference Manual (Revision 4.3). Reference Manual, 2001. (www.arm.com).

[2]ARM. PrimeCell Vectored Interrupt Controller (PL190) (revision r1p2). Reference Manual (DDI 0181E), 2004. (www.arm.com).

[3]ARM. Procedure call standard for the ARM architecture. Application Note (GENC-003524), 2005. (www.arm.com).

[4]Atmel. Disabling interrupts at Processor Level. Application Note (DOC1156A-08/98), 1998. (www.atmel.com).

[5]S. Furber. ARM system-on-chip architecture. Addison-Wesley, 2nd edition, 2000.

[6]J. Labrosse. MicroC/OS-II: The real-time kernel. CMP Books, 2nd edition, 2002.

[7]J. Labrosse. MicroC/OS-II and the ARM processor. Micrium Application Note AN-1011 (Revision D), 2004. (www.micrium.com).

[8]J. J. Labrosse. Embedded Systems Building Blocks: Complete and Ready-to-Use Modules in C. CMP Books, 2nd edition, 2000. (www.micrium.com).

[9]Philips. Nesting of interrupts on the LPC2000. Application Note, 2005. (www.philips.com).

[10]Philips. Volume 1: LPC213x User Manual. User Manual, 2005. (www.philips.com).

[11]W. Schwartz. Enhancing Performance Using an ARM Microcontroller with Zero Wait-State Flash. Information Quarterly, 3(2), 2004.

[12]D. Seal. ARM Architecture Reference Manual. Addison-Wesley, 2nd edition, 2000.

[13]A. N. Sloss, D. Symes, and C Wright. ARM System Developer’s Guide. Morgan Kaufman, 2004.

53