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Inputs and Outputs

The 82C55 also has CMOS-compatible outputs, which means that they can drive either LSTTL or CMOS inputs. When driving CMOS inputs, the NMOS 8255’s outputs should have pull-up resistors to ensure that high outputs are at least 3.5 volts.

A third advantage to the 82C55 is greater current-sourcing ability, which can be important if you want to directly drive a transistor or source more than a fraction of a milliampere. Intel’s 82C55 can source 2.5 milliamperes at 3 volts, compared to just 0.4 milliamperes at 2.4 volts for the 8255. However, NEC’s CMOS 71055 has the same current-sourcing ability as the NMOS 8255, so it depends on the manufacturer. All can sink 2.5 milliamperes at 0.45 volts. The 74LS374 latch (U14) has greater output drive ability than any of the 8255s.

Speed Ratings

The 8255 is also available with different speed ratings, including 3 Mhz and 5 Mhz. The 5-Mhz part is sometimes called the 8255-5. From the ratings, it may seem that the 8255 is too slow to interface to a 12-Mhz 8052-BASIC. But what does the speed rating actually refer to? Since the 8255 was developed for the 8085, I suspect that it refers to the maximum

Figure 6-5. Pinout of the 8255 Programmable Peripheral Interface.

Chapter 6

Inputs and Outputs

Chapter 6

Figure 6-6. Connections for adding an 8255 Programmable Peripheral Interface.

crystal frequency of an 8085 interfaced to the 8255. Because the signal timings for an 8052 are very different, these ratings don’t apply and you have to look at the timing diagrams to determine what will work. For use with the 8052-BASIC, use a 5-Mhz or faster 8255 if your crystal is 12 Mhz. Slower crystals can use the 3-Mhz or 5-Mhz versions.

Inputs and Outputs

An 8255 Interface

Figure 6-6 shows an 8255 (U15) accessed at FC00h in the 8052-BASIC system. Many of the pins connect directly to matching signals in the system: D0-D7 connect to the system’s data bus, A0 and A1 connect to the lowest two address lines, and the RD and WR inputs connect to U2’s matching outputs. CS connects to pin 7 of U11 (from Figure 6-2), which selects the chip at addresses from FC00h to FFFFh. U15 actually uses four of these addresses: FC00h through FC03h.

U15’s RESET input is controlled by the same RESET signal at pin 9 of the 8052-BASIC. The three new I/O ports are Port A, Port B, and Port C. Address lines A0 and A1 select the port to be accessed, with Port A at FC00h, Port B at FC01h, and Port C at FC02h.

The port pins should connect only to voltages in the range -0.5V to +6.5V. According to Intel’s data sheet, the 82C55 has bus-hold circuits that eliminate the need for external pull-ups on its CMOS inputs.

The Control Word

You configure the 8255 by writing a control word to a control register addressed at FC03h. The control word has two functions: selecting modes of operation, and setting and clearing port bits. When bit 7 of a byte written to the control register is 1, the control word selects modes of operation for each port and determines whether a port is input, output, or bidirectional. Many combinations of modes and I/O are available. When bit 7 of a byte written to the control register is 0, the control word sets and clears individual bits of Port C. The control word is write-only; you can’t read it.

Mode Setting

Figure 6-7, from Intel’s data sheet, describes the mode-set control word. The ports are divided into two groups. Group A consists of Port A plus bits 4-7 of Port C, and Group B consists of Port B plus bits 0-3 of Port C. This grouping enables Ports A and B to each use half of Port C for handshaking, or control, signals.

To set the mode, bit 7 of the control word must be 1. Bit 2 selects mode 0 or 1 for Group B, and bits 5 and 6 select mode 0, 1, or 2 for Group A. Bits 0, 1, 3, and 4 select whether a port is input or output, with each half of Port C selected independently.

The simplest mode is Mode 0, Basic Input/Output. The ports behave very much like the inputs and outputs at U12 and U14. Outputs are latched, so they change only when written to. The inputs are not latched, so the present, or current, value of the input is always read.

This statement configures all ports as inputs in mode 0:

Chapter 6

Figure 6-7. With bit 7 set, writing to the 8255’s control word selects the modes of operation for each port.

Inputs and Outputs

XBY(0FC03h)=9BH

On reset, the 8255 uses this mode, until you tell it differently.

To read Port A, use

PRINT XBY(0FC00H)

or

PH0. XBY(0FC00H)

To read Port B or C, use the same statement, but with 0FC01H or 0FC02H to select the port you desire.

To configure all all bits as outputs in mode 0, use this statement:

XBY(0FC03h)=80H

Then, to write a value to Port A, use

XBY(0FC00h)=xx

where xx is the value to be written.

Use FC01h to write to Port B, and FC02h for Port C.

Combinations of Inputs and Outputs

Fourteen other combinations of inputs and outputs are possible by setting or clearing bits 0, 1, 3, and 4 in the control word as shown in Figure 6-7. To change the mode settings, determine which bits to set and clear for the configuration you want, convert the value to decimal or hexadecimal, and write the value to 0FC03h.

One handy feature of the 8255 is that you can read back the last value written to an output port. With the ports configured as outputs, you can use the same statements you use to read the input ports. At Port B or C, reading an output port gives the value in the output latch, which contains the last value you wrote to the port. Port A works a little differently. Instead of reading the output latch, you read the actual logic states on Port A’s pins. This means that at Port A, if a bit is shorted to ground, you will read back a 0 for that bit, even if the last value written to it was a 1.

Chapter 6

Figure 6-8. With bit 7=0, writing to the 8255’s control register will set or clear individual bits in Port C.

Bit Control

Another useful feature of the 8255 is the ability to set and clear individual bits on Port C. You do so again by writing to the control register, as Figure 6-8 shows. Bit 7 must be 0. Bit 0 selects set or reset (clear) for the bit, and bits 1-3 select the bit to set or clear. For example, this BASIC-52 statement sets bit 7 of Port C:

XBY(0FC03h)=0Fh

To clear bit 7, use this statement:

XBY(0FC03h)=0Eh

Inputs and Outputs

To set or clear a different bit, determine which bits to set and clear for the result you want, convert the value to decimal or hexadecimal, and write the value to 0FC03h.

Adding Handshaking

For many applications, Mode 0 is all you need. Modes 1 and 2 add handshaking, or control, signals for components that require them.

Mode 1 is Strobed Input/Output. It uses Port C for handshaking signals that let the 8052-BASIC and the peripheral tell each other whether or not they’re ready to send or receive data, and to confirm that data has been received. Mode 1 also latches the input data, so you can use an external signal to latch data into U15, and save it until the 8052-BASIC has time to read it. In Mode 1, you can configure Ports A and B to be inputs, outputs, or one of each.

Each port has its own set of handshaking signals on Port C, as described in Table 6-2.

Input Control. For input ports, these are the added signals:

STB (strobe input) causes data to load into the 8255’s input latch. In Mode 1, the 8052-BASIC can’t read the data at U15’s ports until STB’s rising edge latches the data in. You can use an output of a clock or counter chip to latch data into U15 at timed intervals, or latch data when a user presses a key.

IBF (input buffer full output) goes high to indicate that the 8255 has loaded data in response to STB. When the 8052-BASIC reads the data, the rising edge of RD brings IBF low again. You can use IBF to clear or reset the device that generated STB.

INTE (interrupt enable) is an internal signal that you must set to enable INTR, described next. For Group A, you set INTE by writing 1 to Port C, bit 4. For Group B, write 1 to Port C, bit 2. The BASIC-52 statement to set INTE for Port A is this:

XBY(0F03h)=9

For Port B, it’s this:

XBY(0F03h)=5

Writing to these locations sets internal bits in U12. However, these write operations have no effect on the STB inputs, which share the same bit addresses at Port C.

INTR (interrupt request output) goes high when INTE is set and both STB and IBF are high, to signal that the 8255 has data waiting to be read. INTR can connect to an interrupt input on the 8052-BASIC (pin 13, for example), to cause it to jump to an interrupt routine that reads