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2.1.1.1Mechanical details

Power Transmitter design B5 includes a Primary Coil array as defined in Section 2.1.1.1.1, Shielding as defined in Section 2.1.1.1.2, and an Interface Surface as defined in Section 2.1.1.1.3.

2.1.1.1.1Primary Coil array

The Primary Coil array consists of partly overlapping square shaped planar coils. Figure 2-2(a) shows a top view of a single Primary Coil, which consists of a bifilar trace that runs through 11 square shaped turns in a single layer of a PCB. Another realization of a single Primary Coil is to construct it from Litz wire having 24 strands of no. 40 AWG (0.08 mm diameter), or equivalent.. Figure 2-2(b) shows a top view of such wire-wound Primary Coil. Table 2-1 lists the relevant parameters of the coils shown in Figure 2-2.

Figure 2-2: Top view of PCB and wire-wound Primary Coil of Power Transmitter design B5

Table 2-1: Primary Coil parameters of Power Transmitter design B5

*Value applies to the outermost winding

The Primary Coil array may be constructed from PCB-coils, wire-wound coils or any combination thereof (hybrid). Power Transmitter design B5 enables one-dimensional freedom of positioning. For that purpose the Primary Coils are placed in a row, such that there is an overlap of approximately two-thirds of

System Description

Wireless Power Transfer

the area. Each Primary Coil (except for the Primary Coils at both ends of the Primary Coil array) overlaps with two Primary Coils in different layers. Figure 2-3 shows the layout of the Primary Coil array. Figure 2-4 shows the layered structure of the Primary Coil array in the case of a PCB only implementation, a Litz wire only implementation and a hybrid PCB-Litz wire implementation. Table 2-2 lists the relevant parameters of the Primary Coil array. Any layer of the PCB—if present—may contain functionality other than, or in addition to, the Primary Coils. If such other functionality is present, that functionality shall not affect the inductance values of the Primary Coils.

Figure 2-3: Top view (a) and cross section (b) of the Primary Coilarray of Power Transmitter design B5.

N87 — Epcos AG.

PC44 — TDK Corp.

Interface dz Surface

ds

Figure 2-5: Primary Coil array assembly of Power Transmitter design B5

2.1.1.1.3Interface Surface

As shown in Figure 2-5, the distance from the Primary Coil array to the Interface Surface of the Base Station is mm, across the top face of the Primary Coil array. In addition, the Interface Surface extends at least 5 mm beyond the outer edges of the Primary Coil array.

2.1.1.2Electrical details

As shown in Figure 2-6, Power Transmitter design B5 uses a full-bridge inverter to drive the Primary Coil array. In addition, Power Transmitter design B5 uses a multiplexer to select the position of the Active Area. The multiplexer shall configure the Primary Coil array in such a way that one, or two Primary Coils are connected—in parallel—to the driving circuit. The connected Primary Coils together constitute a Primary Cell. In the case that two Primary Coils are selected, these two Primary Coils shall have an overlap of two-thirds of the area of a single Primary Coil.

Full-bridge

Inverter

Figure 2-6: Electrical diagram (outline) of Power Transmitter design B5

has an inductance of μH for each individual Primary Coil in layer (a) (closest to the Interface Surface), μH for each individual Primary Coil in layer (b), and μH for each individual Primary

Coil in layer (c) (closest to the Shielding). The capacitances and inductance in the impedance matching

Power Transmitter design B5 uses the phase difference between the control signals to two halves of the full-bridge inverter to control the amount of power that is transferred, see Figure 2-7. For this purpose, the range of the phase difference is 0…180 —with a larger phase difference resulting in a lower power transfer. In order to achieve a sufficient accurate adjustment of the power that is transferred, a type B5 Power Transmitter shall be able to control the phase difference with a resolution of 0.42 or better. When a type B5 Power Transmitter first applies a Power Signal (Digital Ping, see [Part 1], Section 5.2.1), it shall use an initial phase difference of 120 .

Figure 2-7: Control signals to the inverter

Control of the power transfer shall proceed using the PID algorithm, which is defined in [Part 1] Section 5.2.3.1. The controlled variable ( ) introduced in the definition of that algorithm represents the phase difference between the two halves of the full-bridge inverter. In order to guarantee sufficiently accurate power control, a type B5 Transmitter shall determine the amplitude of the current into the Primary Cell with a resolution of 5 mA or better. In addition to the PID algorithm, a type B5 Power Transmitter shall limit the current into the Primary Cell to at most 4 A RMS in the case that the Primary Cell consists of two Primary Coils, or at most 2 A RMS in the case that the Primary Cell consists of one Primary Coil. Finally, Table 2-3 provides the values of several parameters, which are used in the PID algorithm.

Table 2-3: Control parameters for power control

2.1.1.3Scalability

Power Transmitter Design B5 offers the same scalability options as Power Transmitter design B1. See [Part 1], Section 3.3.1.3.