Файл: Digital design with CPLD applications and VHDL (R. Dueck, 2000).pdf

Subtraction

The real advantage of complement notation becomes evident when we subtract signed binary numbers. In complement notation, we add a negative number instead of subtracting a positive number. We thus have only one kind of operation—addition—and can use the same circuitry for both addition and subtraction.

This idea does not work for true-magnitude numbers. In the complement forms, the magnitude bits change depending on the sign of the number. In true-magnitude form, the magnitude bits are the same regardless of the sign of the number.

Let us subtract 8010 6510 1510 using 1’s complement and 2’s complement addition. We will also show that the method of adding a negative number to perform subtraction is not valid for true-magnitude signed numbers.

1’s Complement Method

K E Y T E R M

End-around carry An operation in 1’s complement subtraction where the carry

bit resulting from a sum of two 1’s complement numbers is added to that sum.

Add the 1’s complement values of 80 and 65. If the sum results in a carry beyond the sign bit, perform an end-around carry. That is, add the carry to the sum.

2’s Complement Method

Add the 2’s complement values of 80 and 65. If the sum results in a carry beyond the sign bit, discard it.

(Discard carry)

True-Magnitude Method

8010 01010000

6510 010000016510 11000001

If we perform an end-around carry, the result is 00010010 1810. If we discard the carry, the result is 00010001 1710. Neither answer is correct. Thus, adding a negative true-magnitude number is not equivalent to subtraction.

Negative Sum or Difference

All examples to this point have given positive-valued results. When a 2’s complement addition or subtraction yields a negative sum or difference, we can’t just read the magnitude from the result, since a 2’s complement operation modifies the bits of a negative number. We must calculate the 2’s complement of the sum or difference, which will give us the positive number that has the same magnitude. That is, ( x) x.

65 0100000180 10110000 11110001

Take the 2’s complement of the difference to find the positive number with the same magnitude.

The last five bits of the binary equivalent of 16 are the same in both the 5-bit and 8-bit numbers.

N O T E

The 8-bit number is padded with leading 1s. This same general pattern applies for any negative number with a power-of-2 magnitude. ( 2n n 0s preceded by all 1s within the defined number size.)

SECTION 6.3 REVIEW PROBLEM

6.5Write 32 as an 8-bit 2’s complement number.

6.6Write 32 as a 6-bit 2’s complement number.

Sign Bit Overflow

K E Y T E R M

Overflow An erroneous carry into the sign bit of a signed binary number that results from a sum or difference larger than can be represented by the number of magnitude bits.

Signed addition of positive numbers is performed in the same way as unsigned addition. The only problem occurs when the number of bits in the sum of two numbers exceeds the number of magnitude bits and overflows into the sign bit. This causes the number to appear to be negative when it is not. For example, the sum 75 96 171 causes an overflow in 8-bit signed addition. In unsigned addition the binary equivalent is:

10010111100000 10101011

In signed addition, the sum is the same, but has a different meaning.

The sign bit is 1, indicating a negative number, which cannot be true, since the sum of two positive numbers is always positive.

N O T E

A sum of positive signed binary numbers must not exceed 2n 1 for numbers having n magnitude bits. Otherwise, there will be an overflow into the sign bit.

Overflow in Negative Sums

Overflow can also occur with large negative numbers. For example, the addition of 8010 and 6510 should produce the result:

8010 ( 6510) 14510