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164EMBEDDED CONTROLLER
Hardware Design
Bit P1.7 can be cleared to logic zero by executing the instruction CLR 97h. Likewise, a single input bit can be tested using a conditional jump instruction, such as: JB 90h,address which will jump to the address only if the LSB of Port 1 (P1.0) is high when the instruction is executed. You can easily observe this operation by using a logic probe or meter connected to pin 1 of the processor chip, which is the LSB of Port 1 (P1.0). Normally the pin will be in the logic one state after reset, but executing the CLR 90h instruction will clear P1.0. I/O pins can also be input directly to another bit, such as the carry bit, which is very useful when sending and receiving information by a serial bit sequence. This is exactly how the data and addresses are sent and received between the processor and serial I/O and memory devices.
It’s important to recognize that some instructions modify the output latch, rather than the input pin. This applies to instructions that read-modify-write the output pins, such as ANDing the port with a constant value to mask certain bits. This is necessary because the I/O pins can serve as input or output. Pins which are to be used as inputs must be written with a logic one output first, so that an external device such as a switch to ground, can pull the line low.
If the pins were used directly, then a pin that was being used as an input but just happened to be low at the time that the logical AND operation was carried out, would become stuck low! By performing the logical AND with the output register instead, the state of the input pin will not be affected.
The internal circuits for the I/O pin are shown in simplified form in the figure. The 8051 uses a modified open-drain output structure, which allows it to oper-
ate as either input or output, or even both at the same time. It consists of a constant |
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current pull-up (current source), an |
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N-channel MOSFET switch as a pull- |
+V |
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down device (FET sinks current). |
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Resistor |
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The FET is an active switch, so it can |
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IOH Sources |
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sink more current. That is why the |
In |
Current |
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8051’s sink current is large compared |
Port |
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Pin |
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to source. |
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Out |
Output |
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The simplified I/O port circuit diagram |
IOL |
Sinks |
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NMOS FET |
Current |
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in Figure 8-1 shows a pull-up resistor |
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providing a weak current source, and a |
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FET pull-down capable of sinking more |
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current. The input pin can also be read |
Figure 8-1: Simplified I/O port circuit. |
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165CHAPTER EIGHT
Basic I/O Interfaces
by the input buffer. This allows the pin to be used as either input or output. When using the pin as an input, the FET must be turned off by writing a one to the output pin. Then an external device, such as a switch connected between the pin and ground, will pull the input low when the switch is closed. When using one of these pins as an input, an external pull-up is usually not required, as the pin is pulled up internally.
While the simplified representation approximates the behavior of the circuit, in order to thoroughly understand how it behaves, we must go deeper. The diagram in Figure 8-2 shows a somewhat more accurate version of the circuit,
which is referred to as a “quasi-
+V
bi-directional” circuit. The pull-up is actually a current source, which
can source one of two currents. When the output is static in the
high state, the current source provides about 50 microamperes of current to an external load.
When the output pin transitions
from one to zero, the FET switches on, sinking the source current and
the current from any output load to
ground. The switch is not perfect, and has some resistance, which causes the output voltage to rise somewhat above ground. If the current source is a resistor, then the low-to-high output voltage transition would be very slow, due to the R-C time constant formed by the resistor and the load capacitance. Even with a small constant current source, the output voltage will ramp up slowly. The current source in the 8051 behaves differently on a zero-to-one transition. When the output pin transitions from zero to one, the current source provides a much higher current for a very short time, pulling the output voltage up quickly. Then the current source reverts to its lower value. This unique feature of the output addresses the slow rise time problem by lowering the time constant during the zero-to-one transition, without requiring an external input device to sink more than 50 microamperes. A secondary benefit is that the pin circuitry does not have to be explicitly programmed as an input or output, as is the case with all other microcontroller families. This also means that the pin can be used alternately for input and output, like an open-collector or opendrain bus without concern for bus contention. This is useful for things like
166EMBEDDED CONTROLLER
Hardware Design
shared request lines and multiprocessor communication. The disadvantage to this type of I/O circuit is that it cannot source much current. The sink current is greater than the source current, but still less than other microcontrollers.
Output Current Limitations
The output low (sink) current for the 80C32 is limited to approximately15 milliamperes maximum. That is an absolute maximum specification value, meaning that output current in excess of this value can damage the device. Shorting a low output to the power supply would damage the device. In addition, the total sink current for an 8-bit port is limited to approximately 26 milliamperes. So if all the outputs of a port are low at the same time, they can only sink a little more than 3 milliamperes each.
On the other hand, the current source will not supply any more than about 50 microamperes under static conditions, so it cannot be destroyed by shorting an output to ground. The 80C32 current source also has an additional feature that improves input noise immunity. The current that must be sunk by an external device trying to pull the 80C32 pin low increases as it approaches ground during a one-to-zero transition. That means that weak low going noise pulses are less likely to cause an error.
Let’s examine a simple case, that of driving a LED which needs around 10 milliamperes to be clearly visible. In this case, we connect the LED and a resistor to limit the current between the power supply and the processor pin as shown in Figure 8-3.
+5 V
330 to
470 Ohms
80C32
Port 1 |
1 |
LED |
|
Bit 0 |
The LED will be off as long as the output pin is high. When the output pin goes low,
the output will sink current and the LED will turn on. LEDs have a relatively constant voltage (1.5 to 2 volts typical) across them when they are operating.
If the LED has 2 volts across it, then the resistor has the remaining 3 volts across it, then the current in the resistor and LED is 3 volts/330 ohms, or about 9 milliamperes. This will be enough current to light the LED, but it won’t be very bright. Also, the processor would only be capable of lighting a couple of LEDs. When more output current is required, other circuits can be used.
167CHAPTER EIGHT
Basic I/O Interfaces
+5 V
330 to |
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80C32 |
470 Ohms |
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CPU Pin |
LED Typically |
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Requires from |
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Sources |
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10–20 mA for |
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+ |
Current |
Full Brightness |
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Turns |
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Transistor |
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Port 1 |
ON |
Output |
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Sinks |
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Bit 0 |
Current |
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Optional |
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Base Current |
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Limiting R |
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Figure 8-4: NPN transistor for greater load current.
Figure 8-4 shows how an NPN transistor can be used to amplify the current from the processor’s output. The processor’s output source current and transistor gain limit the potential load current. A special type of transistor, called a Darlington transistor, has a very high current gain, on the order of thousands. The CPU’s output high current is multiplied by the transistor’s gain, allowing much more current to flow in the load.
In this case, the 50 microampere source current is multiplied by the transistor gain, allowing more current to flow in the transistor collector, and hence the resistor and LED. When the output pin is high, the LED is on. For 8051 family parts, a current limiting resistor in series with the transistor base is not required, since the current source limits the base current. Other processor outputs will usually require the base resistor to limit the base current. The low source current and transistor gain is a limiting factor in this case, along with the higher saturation voltage on the collector-emitter output of the Darlington transistor compared to a regular transistor. Note that the output voltage switched by the transistor is separate from the processor supply, so this circuit can also be used to switch much higher voltages, limited only by the transistor’s maximum collector voltage specification. Yet another approach, using a PNP transistor may be a better solution for high current loads.
This approach is shown in Figure 8-5. Using a PNP transistor so that the processor’s output greater output low sink current to turn on the transistor, allows a standard transistor to be used in place of a Darlington device. It also allows the output switch to control a grounded load, which the previous versions could not. For an output low current of 1.6 milliamperes (one standard TTL load) and a
Base Current |
+5 V |
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Limiting R |
Transistor |
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Port 1 |
1K to 4.7K |
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Sources |
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Bit 0 |
Current |
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CPU Pin |
toLoad |
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Sinks |
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Current |
330 to |
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Turns |
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470 Ohms |
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Transistor |
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NMOS FET |
ON when |
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Outpu LOW |
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LED
80C32
Figure 8-5: PNP transistor output driver.
168EMBEDDED CONTROLLER
Hardware Design
modest transistor gain of 50, the transistor will be switched on with very little voltage across the transistor. Note that the LED will be on when the I/O pin is low. When the processor is reset, all the output pins are set high. This is good for loads that must star out without power when the device is first powered up.
+5 V |
80C32 |
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I/O Voltage |
Simplified |
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Input Circuit |
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> Vdd+Vf |
– |
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Forces Current |
Substrate |
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into Pin |
Vf |
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+ |
Diode |
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Input Current |
– |
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Limiting R |
Substrate |
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Vf |
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I/O Voltage |
+ |
Diode |
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< Vss–Vf |
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Forces Current |
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Out of Pin |
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Figure 8-6: I/O pin voltage limits.
Because of the way the transistor is connected, this configuration does not allow the load to be connected to a supply voltage higher than that of the processor’s. By combining the NPN and PNP transistor circuits, it is possible to switch higher voltages. Higher voltages can cause problems on the input pins if not properly protected. The reasons for this are illustrated in Figure 8-6.
Looking at the absolute maximum ratings for a chip, you will observe that most device inputs must be kept within a diode’s forward voltage drop of the power supply and ground. When turned on, a silicon diode has about a 0.6 to 0.7 volt drop across it. There are parasitic diodes from the input pins to the power and ground signals, which are used to isolate the various internal circuits on the chip from one another on the chip’s substrate. The substrate is the foundation upon which all the transistors and other components are laid,
and is usually also the signal ground. The diodes can be turned on if the input goes above the power supply or below ground, causing large currents to flow in the chip. Even worse, these currents can cause a CMOS chip to “latch up,” damaging or destroying the chip. This occurs because CMOS chips have four layers, equivalent to a silicon-controlled rectifier (SCR), which shorts its outputs as long as power is applied, once it has been triggered. The net effect is that the CMOS chip will become a short between the power supply and ground, causing large currents to flow, quickly heating up and even burning out the entire chip. Generally this will occur in such a way as to burn out the most expensive chip on the board, thereby protecting the 10¢ power supply fuse from blowing out!
Voltages that exceed the chip’s allowable limits can be generated by overshoot on the signals due to unterminated transmission lines, electrostatic discharge (ESD) effects, or power transients. It can also be caused when an unpowered