Файл: Introduction to microcontrollers (G. Gridling, 2006).pdf

Chapter 3

Communication Interfaces

Although communication interface modules are often integrated into the controller and can therefore be seen as controller components, we nevertheless give them their own chapter. Still, microcontrollers generally contain several communication interfaces and sometimes even multiple instances of a particular interface, like two UART modules. The basic purpose of any such interface is to allow the microcontroller to communicate with other units, be they other microcontrollers, peripherals, or a host PC. The implementation of such interfaces can take many forms, but basically, interfaces can be categorized according to a hand-full of properties: They can be either serial or parallel, synchronous or asynchronous, use a bus or point-to-point communication, be full-duplex or half duplex, and can either be based on a master-slave principle or consist of equal partners. In this section, we will only consider wired communication.

A serial interface sends data sequentially, one bit at a time. Clearly, this method requires only one data line, so the communication is resource efficient. On the negative side, data transfer is slow1. A parallel interface, on the other hand, uses several data lines to transfer more than one bit a time. The number of bits that are transfered in parallel varies. Widths of 4 and 8 bit are particularly useful because they correspond to half-bytes and bytes in the microcontroller. Parallel interfaces with that width can be found e.g. in LCD displays.

The synchronicity of communication refers to the relationship between receive clock and send clock. In a synchronous interface, the receive clock is linked to the send clock. This can either be done by employing an additional clock line that drives both send and receive unit, or by utilizing a data format that allows the receiver to reconstruct the clock signal. The advantage of this method is that the receiver does not need to generate its own clock and is hence less susceptible to synchronization errors. In an asynchronous interface, send and receive clock are not connected. Instead, the receiver must know the timing of the transmission in advance and must set its receive clock to the same frequency as that of the sender. Since the send and receive clocks are generally not synchronized, the receiver has to employ oversampling to synchronize to the sender. The communication also requires special start and stop bits to allow the receiver to recognize the start of a data block. Asynchronous communication is hence slower than synchronous communication, both because the receiver has to oversample and because the communication is less efficient.

In a bus topology, more than two devices can be connected to the communication medium. Such communication structures are also known as multi-drop networks. Some sort of addressing is required to select a particular device. Alternatively, point-to-point connections are designed for communication

1Assuming that there are external constraints on the clock frequency, e.g., by the microcontroller clock frequency. Without that constraint, serial interfaces can be and often are faster than parallel ones, because it is easier to shield a single line from the adverse effects of high-frequency data transmission than several parallel ones.

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between just two devices. Addressing is not required since it is clear who the receiver of a message will be.

In most cases, data communication between a controller and its peripherals is bi-directional, that is, both controller and peripheral device will at some time transmit data. For point-to-point connections (and some buses), the question arises whether two devices can transmit at the same time or not. In a full-duplex connection, both sides can transmit at the same time. Naturally, this requires at least two wires, one for each node, to avoid collisions, and allows a maximum overall throughput. The technique is useful if both communication partners have much to transmit at the same time. In halfduplex communication, only one node transmits at any time. This saves on wires, because only one wire is required for a half-duplex serial connection. Drawbacks are less overall throughput and the necessity of negotiating access to the single wire. The mode is particularly useful if there is one communication partner (e.g. a sensor device) that has to transmit much data, whereas its peer is mostly receiving.

Another interesting characteristic of communication interfaces is whether there is one node that initiates transmissions, or whether any node can start a transmission. In master-slave systems, only the master can initiate a transmission. Slaves must wait for the master to allow them access to the communication medium. In systems where all nodes are equal2, on the other hand, any node can begin to transmit if the medium is free. Naturally, such systems may require some kind of arbitration to handle concurrent access to the medium.

On the physical layer, it is important to note whether a communciation interface is single-ended or differential. In a single-ended interface, the voltage levels of all wires are with respect to ground. In consequence, sender and receiver have to share the same ground, which can be a problem if sender and receiver are far away. Furthermore, interference along the way can cause voltage spikes and hence level changes. Differential interfaces, on the other hand, use two wires to transmit a signal. Here, the voltage difference between the two wires carries the signal. Of course, differential connections require two wires compared to the one of the single-ended connection, but on the plus side, there is no need for a common ground. Furthermore, any noise is likely to affect both wires the same way, so the voltage difference will not change. In consequence, differential interfaces allow longer transmission lines than single-ended ones.

2Unfortunately, there does not appear to exist any specific term for this kind of system.

3.1 SCI (UART)

The Serial Communication Interface (SCI) provides an asynchronous communication interface (Universal Asynchronous Receiver Transmitter, UART). The UART module utilizes two wires, a transmit (TXD) and a receive (RXD) line, for fullor half-duplex communication.

Figure 3.1 shows the internal structure of a UART. Basically, the module consists of a transmit and a receive register to hold the data. True to its asynchronous nature, transmission and reception on a node are driven by its local clock generator.

Figure 3.1: Basic structure of a UART module.

The UART is no communication protocol per se, but a module that can be used for asynchronous serial communication. Hence, the UART module within a microcontroller allows the application to control much of its behaviour. Configurable parameters include:

Number of Data Bits: Depending on the UART, the number of data bits can be chosen within a more or less wide range. The ATmega series, for example, allows between 5 and 9 data bits. Other UARTs may have a broader or smaller range.

Parity Bit: The user can select whether there should be a parity bit or not, and if yes, whether the parity should be odd or even. If the parity is set to even, the parity bit is 0 if the number of 1’s among the data bits is even. Odd parity is just the opposite.

Stop Bits: The user generally can select whether there should be one stop bit or two.

Baud Rate: The UART module contains a register which allows the user to select a certain baud rate (i.e., the transmission speed, given in bits per second (bps)) from a set of possible ones. Possible baud rates generally include the range within 9600 and 115200 baud. However, since the feasible baud rates depend on the frequency of the system clock, different clock speeds imply different sets of available baud rates.

The nomenclature used for describing the data format is D{E|O|N}S, where D is the number of data bits and S is the number of stop bits. E|O|N indicates even, odd, or no parity. For example, a data format with 8 data bits, even parity, and one stop bit is identified as 8E1. Note that there is no need to specify the number of start bits, since it is always one.