Файл: Single- and Multi-Chip Microcontroller Interfacing For the Motorola 68HC12 (G.J. Lipovski, 1999).pdf
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436 |
Chapter 9 Communications Systems |
nine-bit parallel bus; if the initiator is receiving data, it omits this step. The initiator then drops REQ low. If the target is to receive the data, it picks up the data and drops ACK low. If the target is to send the data, it puts the data on the bus and drops ACK low. When the initiator sees ACK low, if it is receiving data, it picks up the data from the data bus and raises REQ. When the target sees REQ high, it raises ACK high so the next transfer can take place. Up to 1.5 MB/s can be transferred on an SCSI bus this way, according to the original SCSI standard, but faster SCSI buses have been implemented and standardized.
9.5 Conclusions
Communications systems are among the most important I/O systems in a microcomputer. The microcomputer communicates with keyboards, displays, and typewriters, as well as with remote-control stations and other microcomputers, using the UART protocol. The microcomputer can be in a large computer system and have to communicate with other parts of the system using the SDLC protocol. It may be in a laboratory and have to communicate with instrumentation on an IEEE-488 bus. It may have to talk with other systems in a different protocol.
If you would like additional reading, we recommend the excellent Technical Aspects of Data Communication, by John McNamara. It embodies an exceptional amount of practical information, especially at the physical level, and also covers many of the widely used protocols. Motorola offers some fine applications notes on the SDLC protocol and its 6854 chip, such as MC6S54 ADLC, An Introduction to Data Communication, by M. Neumann. For the IEEE-488 protocol using the 68488 chip, the applications note Getting Aboard the 488-1975 Bus is very informative. These applications notes are well written and take you from where this book leaves off to where you can design systems using these protocols.
For more concrete information on the 68HC11, please consult the MC68HCHA8
HCMOS Single-Chip Microcomputer (ADI 1207). In particular, §5 describes the serial communication interface. As noted earlier, we have not attempted to duplicate the diagrams and discussions in that book because we assume you will refer to it while reading this book, and since we present an alternative view of the subject, you can use either or both views.
This chapter covered the main concepts of communications systems at the physical and link-control levels. You should be aware of these concepts so you can understand the problems and capabilities of specialists in this field. You should be able to handle the UART protocol - the simplest and most widely used protocol - and its variations,and you also should be able to use the SCI system in the 6812 and the ACIA chip, as well as the UART, in hardware designs. You should be able to write initialization rituals, interrupt handlers, and gadfly routines to input or output data using such hardware. Hardware and software tools like these should serve most of your design needs and prepare you for designing with the SDLC, IEEE-488, or SCSI interface protocol systems.
9.5 Conclusions |
437 |
Do You Know These Terms?
See page 36for instructions.
levels of abstraction |
bit level |
ring indicator (RI) |
Bisync |
peers |
frame level |
data terminal ready |
transparent mode |
end-to-end |
message level |
(DTR) |
cyclic redundancy |
communication |
protocol |
clear to send (CTS) |
check |
network control |
handshake protocol |
break |
synchronous data |
link control level |
stack |
universal |
link control |
physical-control |
structure |
asynchronous |
(SDLC) |
level |
store and forward |
receiver |
flag pattern |
operating-system |
circuit |
transmitter |
information frame |
level |
governed |
(.UART) |
supervisory |
medium |
centralized |
UART protocol |
nonsequenced |
frequency shift |
distributed |
start bit |
frame |
keying |
master slave |
stop bit |
primary station |
frequency multiplexing |
system |
parity error |
secondary station |
time multiplexing |
differential line |
framing error |
X.25 protocol |
channel |
RS-442 |
double buffering |
data available |
simplex |
standard |
overrun error |
(DAY) |
half-duplex |
active |
asynchronous |
ready for data |
full-duplex |
passive |
communications |
(RFD) |
bit time period |
modem |
interface adapter |
data accepted |
baud rate |
originate modem |
(ACIA) |
(DAC) |
bit rate |
answer modem |
selected |
small computer |
synchronous |
data coupler |
hardware handshake |
system interface |
asynchronous |
answer phone |
software handshake |
(SCSI) |
Manchester |
(ANS) |
remote job entry |
initiators |
code |
switch hook (SH) |
(RJE) |
targets |
448 |
Chapter 10 Display and Storage Systems |
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White |
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Light Gray |
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Dark Gray |
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Black |
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15,750-Hz |
1 Raster Line |
Blacker than Black |
|||
Rate |
|||||
= 63.5 jis |
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a. Video Signal and Sync Levels |
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^ |
525 Raster Lines |
^ |
|||
60-Hz Rate = |
^1 ^* |
60-Hz Rate = |
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262 1/2 Raster Lines |
li |
U li |
262 1/2 Raster Lines |
U |
|
LI li |
II . . . U II |
U LI ... U LI li |
|||
. Horizontal Sync |
|||||
I |
J |
Vertical Svnc |
|||
900 MS |
b. Vertical and Horizontal Sync Signals |
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Figure 10.3. The Composite Video Signal
10.1.2 A 6812 SPI Display
We are fortunate that the 6812 has a built-in counter and shift register able to generate the synchronization pulses and the bit stream to implement a primitive CRT display. The 6812 output compare timers, described in Chapter 7, are capable of generating the vertical and horizontal sync pulses; and the serial peripheral interface (SPI), introduced in Chapter 4, has the capability of generating a CRT display having poor, but useful, resolution. The upcoming C procedure main() should produce a picture as shown in Figure 10.4, using the simple hardware diagrammed in Figure 10.5 with a single-chip 6812. It is quite useful for explaining the principles of CRT display systems, since it uses familiar 6812 peripherals. It might be useful for multicomputer systems as a diagnostic display available on each microcomputer. We have found it helpful in testing some bargain-priced CRTs when we did not have specifications on the permissible range of horizontal and vertical sync pulse widths and frequencies. This little program lets us easily test these systems to generate the specifications. We now describe how that builtin CRT generator in the 6812 can produce a CRT display.
A combined sync signal is generated that is the exclusive-OR of the vertical and horizontal sync signals. The CRT's sync separator outputs its high-frequency component to the horizontal oscillator and a low-frequency component to the vertical oscillator. By inverting the horizontal sync signal during vertical retrace, the signal's low-frequency component has a pulse during this period. The high-frequency output of the sync separator continues to synchronize the horizontal oscillator during vertical retrace, while the low-frequency component synchronizes the vertical oscillator during vertical retrace.
474 |
Chapter 10 Display and Storage Systems |
This text has been fun for us. Microcomputers like the 6812 are such powerful tools that it challenges the mind to dream up ways to use them well. We sincerely hope you have enjoyed reading about and experimenting with the 6812microcomputer.
Do You Know These Terms?
See page 36for instructions.
National |
Bresenham |
logical sector |
specify |
Television |
algorithm |
number (LSN) |
read id |
System |
window |
interleave factor |
sense drive |
Committee |
clipped |
unformatted |
sense status |
(NTSC) |
secondary storage |
capacity |
command phase |
raster line |
surface |
formatted capacity |
execution phase |
frame |
track |
format |
result phase |
pixel |
cylinder |
seek |
verify |
NTSC composite |
step rate |
read sector |
boot sector |
video signal |
settling time |
implied seek |
cluster |
horizontal retrace |
fill |
write sector |
directory |
vertical retrace |
sector |
restoring |
root directory |
horizontal sync |
index hole |
recalibrating the |
file allocation |
vertical sync |
index pulse |
drive |
table (FAT) |
sync separator |