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6The Quintessential PIC Microcontroller

cessor, the Intel 4004, handled its data four bits (a nybble) at a time. Many current processors cope with blocks of 8 bits (a byte), 16 bits (a word), or 32 bits (a long-word). 64-bit (a quad-word) devices are on the horizon. These groupings are shown in Table 1.2. The names illustrated are somewhat de-facto, and variations are sometimes encountered.

As in the decimal number system, large binary numbers are often expressed using the prefixes k (kilo), M (mega) and G (giga). A binary kilo is 210 = 1024; for example 64 kbyte of memory. In an analogous way, a binary mega is 220 = 1, 048, 576; thus a 1.44 Mbyte floppy disk. Similarly a 2 Gbyte hard disk has a storage capacity of 2 × 230 = 2, 147, 483, 648 bytes. The former representation is certainly preferable.

Table 1.2: Some common bit groupings.

Bit

(1 bit)

0−1

(0−1)

Nybble

(4 bits)

0−15

(0000−1111)

Byte

(8 bits)

0−255

(0000 0000−11111 1111)

Word

(16 bits)

0−65,535

(0000 0000 0000 0000−1111 1111 1111 1111)

Long-word (32 bits) 0−4,294,967,295

(0000 0000 0000 0000 0000 0000 0000 0000−1111 1111 1111 1111 1111 1111 1111 1111)

Long binary numbers are not very human friendly. In Table 1.2, binary numbers were zoned into fields of four digits to improve readability. Thus the address of a data unit stored in memory might be 1000 1100 0001 0100 0000 1010b. If each group of four can be given its own symbol, 0…9 and A…F, as shown in Table 1.3, then the address becomes 8C140Ah; a rather more manageable characterization. This code is called hexadecimal, as there are 16 symbols. Hexadecimal (base-16) numbers are a viable number base in their own right, rather than just being a convenient binary representation. Each column is worth 160, 161, 162 . . . 16n in the normal way.5

Binary Coded Decimal is a hybrid binary/decimal code extensively used at the input/output ports of a digital system (see Example 11.5 on page 298). Here each decimal digit is individually replaced by its 4-bit binary equivalent. Thus 1998 is coded as (0001 1001 1001 1000)BCD. This is very di erent from the equivalent natural binary code; even if it is represented by 0s and 1s. As might be expected, arithmetic in such

5Many scientific calculators, including that in the Accessories group under Windows 95, can do hexadecimal arithmetic.


1. Digital Representation 7

Table 1.3: Di erent ways of representing the quantities decimal 0…20.

Decimal

Natural binary

Hexadecimal

Binary

00

00000

00

0000

0000

01

00001

01

0000

0001

02

00010

02

0000

0010

03

00011

03

0000

0011

04

00100

04

0000

0100

05

00101

05

0000

0101

06

00110

06

0000

0110

07

00111

07

0000

0111

08

01000

08

0000

1000

09

01001

09

0000

1001

10

01010

0A

0001

0000

11

01011

0B

0001

0001

12

01100

0C

0001

0010

13

01101

0D

0001

0011

14

01110

0E

0001

0100

15

01111

0F

0001

0101

16

10000

10

0001

0110

17

10001

11

0001

0111

18

10010

12

0001

1000

19

10011

13

0001

1001

20

10100

14

0010

0000

a hybrid system is di cult, and BCD is normally converted to natural binary at the system input and processing is done in natural binary before being converted back (see Program 5.9 on page 131).

The rules of arithmetic are the same in natural binary6 as they are in the more familiar base 10 system, indeed any base-n radix scheme. The simplest of these is addition, which is a shorthand way of totalling quantities, as compared to the more primitive counting or incrementation process. Thus 2+4 = 6 is rather more e cient than 2+1 = 3; 3+1 = 4; 4 + 1 = 5; 5 + 1 = 6. However, it does involve memorizing the rules of addition.7 In decimal this involves 45 rules, assuming that order is irrelevant; from 0 +0 = 0 to 9 +9 = 18. Binary addition is much simpler as it is covered by only three rules:

0 + 0

=

0

1

+

0

=

1

0

+

1

= 10

(0 carry 1)

1 + 1

Based on these rules, the least significant bit (LSB) is totalized first, passing a carry if necessary to the next left column. The process ends with

6Sometimes called 8-4-2-1 code after the weightings of the first four lowest columns. 7Which you had to do way back in the mists of time in primary/elementary school!


8The Quintessential PIC Microcontroller

the most significant bit (MSB) column, its carry being the new MSD of the sum. For example:

1

1

0 1

2 6 3

1

0 0 1

8 4 2 6 8 4 2 1

96

Augend

1100000

Augend

+ 37

Addend

+ 0100101

Addend

Carries

Carries

1 1

1 1

133

Sum

10000101

Sum

(a) Decimal

(b) Binary

Just as addition implements an up count, subtraction corresponds to a down count, where units are removed from the total. Thus 8 − 5 = 3 is the equivalent of 8 − 1 = 7; 7 − 1 = 6; 6 − 1 = 5; 5 − 1 = 4; 4 − 1 = 3.

The technique of decimal subtraction you are familiar with applies the subtraction rules commencing from LSB and working to the MSB. In any given column were a larger quantity is to be taken away from a smaller quantity, a unit digit is borrowed from the next higher column and given back after the subtraction is completed. Based on this borrow principle, the subtraction rules are given by:

0 − 0 = 0

10 − 1 = 1 Borrowing 1 from the higher column

1 − 0 = 1

1 − 1 = 0

For example:

1

6 3

1

0

1

4 2

6 8 4 2 1

96

Minuend

1100000

Minuend

- 37

Subrahend

- 0100101

Subrahend

Borrows

Borrows

1

1 1 1 1 1 1

59

Difference

0111011

Difference

(a) Decimal

(b) Binary

Although this familiar method works well, there are several problems implementing it in digital circuitry.

How can we deal with situations where the minuend is larger than the subtrahend?

How can we distinguish between positive and negative quantities?

Can a digital system’s adder circuits be coerced into subtracting?

To illustrate these points, consider the following example:


1. Digital Representation 9

37

Minuend

0100111

Minuend

- 96

Subtrahend

- 1100000

Subtrahend

1

1

41

Difference (- 59)

1000111

Difference (- 0111001)

(a) Decimal

(b) Binary

Normally when we know that the when Minuend is greater than the Subtrahend, the two operands are interchanged and a minus sign is appended to the outcome; that is −(Subtrahend − Minuend). If we do not swap, as in (a) above, then the outcome appears to be incorrect. In fact 41 is correct, in that this is the di erence between 59 (the correct outcome) and 100. 41 is described as the 10’s complement of 59. Furthermore, the fact that a borrow digit was generated from the MSD indicates that the di erence is negative, and therefore appears in this 10’s complement form. Converting from 10’s complement decimal numbers to the ‘normal’ magnitude form is simply a matter of inverting each digit and then adding one to the outcome. A decimal digit is inverted by computing its di erence from 9. Thus the 10’s complement of 3941 is −6059:

3941 6058; +1 = −6059

However, there is no reason why negative numbers should not remain in this complement form – just because we are not familiar with this type of notation.

The complement method of negative quantity representation of course applies to binary numbers. Here the ease of inversion (0 → 1; 1 → 0) makes this technique particularly attractive. Thus in our example above:

1000111 0111000; +1 = −0111001

Again, negative numbers should remain in a 2’s complement form. This complement process is reversible. Thus:

complement normal

Signed decimal numeration has the luxury of using the symbols + and − to denote positive and negative quantities. A 2-state system is stuck with 1s and 0s. However, looking at the last example gives us a clue on how to proceed. A negative outcome gives a borrow back out to the highest column. Thus we can use this MSD as a sign bit, with 0 for + and 1 for −. This gives 1,1000111b for −59 and 0,01110011b for +59. Although for clarity the sign bit has been highlighted above using a comma delimiter, the advantage of this system is that it can be treated in all arithmetic processes in the same way as any other ordinary bit. Doing this, the outcome will give the correct sign:

10 The Quintessential PIC Microcontroller

0,1100000

(+96)

0,0100101

(+37)

1,1011011

(- 37)

1,0100000

(- 96)

1

1

0,0111011

(+59)

1,1000101

(- 59)

(a) Minuend less than subtrahend

(b) Minuend greater than subtrahend

From this example we see that if negative numbers are in a signed 2’s complement form, then we no longer have the requirement to implement hardware subtractors, as adding a negative number is equivalent to subtracting a positive number. Thus A − B = A + (−B). Furthermore, once numbers are in this form, the outcome of any subsequent processing will always remain 2’s complement signed throughout.

There are two di culties associated with signed 2’s complement arithmetic. The first of these is overflow. It is possible that adding two positive or two negative numbers will cause overflow into the sign bit; for instance:

0,1000

(+8)

1,1000

(- 8)

0,1011

(+11)

1,0101

(

-

11)

1

1

0,1101

(+3!!!)

1,0011

(- 13!!!)

(a) Sum of two +ve numbers gives -

ve

(b) Sum of two -

ve numbers gives +ve

In (a) the outcome of (+8) + (+11) is −13! The 24 numerical digit has overflowed into the sign position (actually, 10011b = 19 is the correct outcome). Example (b) shows a similar problem for the addition of two signed negative numbers. Overflow can only happen if both operands have the same sign bits. Detection is then a matter of determining this situation with an outcome that di ers. See Fig. 1.5 for a logic circuit to implement this overflow condition.

The final problem concerns arithmetic on signed operands with different sized fields. For instance:

0,0011001

(+25)

0,0011001

(+25)

0,011

(+03)

1,101

(- 03)

1

????

????

0,0011001

(+25)

0,0011001

(+25)

0,0000011

(+03)

1,1111101

(- 03)

1 1

1

1

1 1 1

1

0,0011100

(+28)

0,0010110

(+22)

(a) Extending a positive number

(b) Extending a negative number


1. Digital Representation 11

Both the examples involve adding an 8-bit to a 16-bit operand. Where the former is positive, the data may be increased to 16 bits by padding with 0s. The situation is slightly less intuitive where negative data requires extension. Here the prescription is to extend the data by padding out with 1s. In the general case the rule is simply to pad out data by propagating the sign bit left. This technique is known as sign extension.

Multiplication by the nth power of two is simply implemented by shifting the data left n places. Thus 00101(5) << 01010(10) << 10100(20) multiplies 5 by 22, where the << operator is used to denote shifting left. The process works for signed numbers as well:

0,00000011

(

3)

1,11111101

( ¡3)

0,00000110

(3 x 2)

<<

<<

+ 0,00011000

(3 x 8)

0,00000110

(

6)

1,11111010

( - 6)

0,00011110

(3 x 10 = 30)

<<

<<

0,00001100

(12)

1,11110100

(

-

12)

<<

<<

0,00011000

(24)

1,11101000

(

-

24)

(a) +3 x 8 = +24

(b)

-

3 x 8 =

-

24

(c) +3 x 10 = 30

Should the sign bit change polarity, then a magnitude bit has overflowed. Some computers/microprocessors have a Arithmetic Shift Left process that signals this situation, as opposed to the standard Logic Shift Left used in unsigned number shifts.

Multiplication by non-powers of 2 can be implemented by a combination of shifting and adding. Thus as shown in (c) above, 3 × 10 is implemented as (3 × 8) + (3 × 2) = (3 × 10) or (3 << 3) + (3 << 1).

In a similar fashion, division by powers of 2 is implemented by shifting right n places. Thus 1100(12) >> 0110(6) >> 0011(3) >> 0001.1(1.5). This process also works for signed numbers:

0,1111.000

(+15)

1,0001.000

(- 15)

0001.1

>>

>>

1010

1111.0

0,0111.100

(+7.5)

1,1000.100

(

-

7.5)

-

1010

>>

>>

0101

0,0011.110

(+3.75)

1,1100.010

(

-

3.75)

-

101.0

>>

>>

000.0

0,0001.111

(+1.875)

1,11110.001

(

-

1.875)

(a) +15/8 = 1.875

(b) -

15/8 = -

1.875

(c) 15/10 = 1.5

Notice that rather than always shifting in 0s, the sign bit should be propagated in from the left. Thus positive numbers shift in 0s and negative numbers shift in 1s. This is known as Arithmetic Shift Right as opposed to Logic Shift Right which always shifts in 0s.

Division by non powers of 2 is illustrated in (c) above. This shows the familiar long division process used in decimal division. This is an