Файл: Embedded system development and labs for ARM (R. Muresan, 2005).pdf

Embedded Systems Development and Labs; The English Edition

d) Compiler Target Specific Options Settings

The compiler target specific options setting is shown in Figure 2-42.

Figure 2-42 Compiler Target Specific Options Settings

e) Compiler Code Generation Settings

The code generation setting is shown in Figure 2-43.

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Figure 2-43 Compiler Code Generation Settings

6. Assembler Settings

The assembler settings is shown in Figure 2-44. All the settings in this page will be displayed in the “Assemble Options” window. The users can manually edit the “Assemble Options” but need to follow the GNU rules.

a) Assembler General Settings

The assembler general settings are shown in Figure 2-44.

●Include Directory – header files directory.

●Object files location – the directory of object files.

●Predefinitions – Define the pre-compile macros.

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Figure 2-44 Assembler General Settings

b) Assembler Code Generation Settings

The assembler warning setting is shown in Figure 2-45.

Figure 2-45 Code Generation Settings

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c) Assembler Target Specific Settings

The assembler target specific setting is shown in Figure 2-46.

Figure 2-46 Assembler Target Specific Settings

d) Assembler Warning Options Settings

The assembler warning options setting is shown in Figure 2-42.

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Figure 2-47 Assembler Warning Options Settings

7. Linker Settings

The linker settings are shown in Figure 2-48. All the settings in this page will be displayed in the “Link Options” edit window. The users can manually edit the Link Options but need to follow the GNU rules. a) Linker General Settings

The linker general setting is shown in Figure 2-48.

●Executable file – generate executable file.

●Library – generate library file.

●Linker script file – select this item only when executable output file is selected.

●Output file name – could be elf or lib file.

Figure 2-48 Linker General Settings

b) Linker Image Entry Options Settings

The assembler warning settings are shown in Figure 2-49.

●Select Entry file – select one of the files listed in the List Box as the first parameter file in the linker command. When the Image Entry Point is set, this item can be empty.

●Image entry point – the entry point of executable file.

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Figure 2-49 Linker Image Entry Options Settings

c) Linker Code Generate Option Settings

The code generation option setting is shown in Figure 2-50.

Figure 2-50 Linker Code Generate Option Settings

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d) Linker Include Object and Library Modules Settings

The include object and library settings are shown in Figure 2-51.

Figure 2-51 Linker Include Object and Library Modules Settings

e) Linker Additional Library Search Path Settings

The additional library search path setting is shown in Figure 2-52.

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Figure 2-52 Linker Add Library Search Path Settings

2.4.4 Project Compiling and Linking

After the project is properly configured, the user can compile and link the project shown as shown in Figure 2-53. If there are any errors, double click the text line in the output window; the error line will be located.

Figure 2-53 Project Build Menu and Tools Bar

2.4.5 Load Debugging

The Embest IDE for ARM includes a software emulator. The user can debug software without the hardware. If the users debug software with the hardware, the JTAG emulator needs to be connected. Select DebugÆRemote Connect and then select “Download” from the menu. If “Automatic Download” is selected in the project settings, the online debugging will be launched immediately after the file is downloaded.

1. Break Point Setting and Single Stepping

The Embest IDE can set break points in source program, disassemble program code source/assembly mixed program.

There are following ways of setting break points:

●Use “Insert/Remove Break Point” button.

●Use F9.

●Use “Hand” pointer.

●Use DebugÆToggle Breakpoint menu item.

A valid break point sample is shown in Figure 2-54.

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Figure 2-54 A Valid Break Point

If a break point is set at a non-executable line, the break point is not valid. The non-valid break point is shown in Figure 2-55.

Figure 2-55 An Invalid Break Point

When the program is executed, it will stop at the first break point as shown in Figure 2-56.

Figure 2-56 Program Stops at Break Point

The user can select DebugÆBreakpoints… item, and a dialog box will list all the break points as shown in Figure 2-57.

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Figure 2-57 Break Point List

The user can click the “Modify” button to modify break point information as shown in Figure 2-58.

Figure 2-58 Break Point Information Modification

In this dialog, user can click the “Advanced” button to add condition information as shown in Figure 2-58.

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Figure 2-59 Add Break Point Condition Information

2. Disassembly Window

The disassembly window is shown in Figure 2-60. Break points can be set in disassembly window.

Figure 2-60 Source File and Its Disassembly Instructions

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3. Register Window

Register Windows is shown in Figure 2-61. It is used to display and modify the values of the registers of the target microprocessor and peripheral devices.

Figure 2-61 Register Window

Click on a register name, the name and the value of the register will be displayed at the top of the window. The user can modify the register value here as shown in Figure 2-62.

Figure 2-62 Register Value Modification

After the value is changed, the color of the register will become red as shown in Figure 2-63.

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Figure 2-63 The Modified Register

4. Memory Window

The memory Window is used to display and modify the content of memory. The display will be started from the address indicated by the user. The Memory Window is shown in Figure 2-64.

Figure 2-64 Memory Window

The user can modify the address from the pull down menu at the top of the Memory Window. The pull down menu can record 10 start addresses as shown in Figure 2-65.

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Figure 2-65 Memory Start Address Pull Down List

5. Data Watch Window

Select ViewÆDebug WindowÆWatch item and the Data Watch Window will be open. The Data Watch Window is used to display variables or expressions that the user wants to watch. This is shown in Figure 2-66.

Figure 2-66 Data Watch Window

6. Variable Window

Select ViewÆDebug WindowÆVariables and the Variable Window will be open. The Variable Window is used to display the values of global or local variables as shown in Figure 2-67.

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Figure 2-67 Variable Window

7. Function Stack Window

Select ViewÆDebug WindowÆCall Stack item and the Function Stack Window will be opened. The Function Stack Window is used to display the call relationship of the software functions. The last called function is at the top of the list. The originating calling function is at the bottom of the list as shown in Figure 2-68.

Figure 2-68 Function Stack Window

Double click on any function in the function list. The IDE will go to the source code of this function as shown in Figure 6-69.

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Figure 6-69 Double Click the Function in the Function List

2.4.6 Flash Programmer

The Embest IDE ARM provides flash programming tool that can erase on-board flash or burn file to the flash. The software dialog window is shown in Figure 2-70.

Figure 2-70. Flash programmer settings

1. Features and Functions of the Flash Programmer

●Supports all microprocessors based on ARM7 and ARM9 such as AT91R4087, EP7312, S3C4510 and S3C2410, etc.

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●Supports most of flash products such as ATMEL AM29 series, Intel 28 series and SST 29/39/49 series, etc.

●Supports flash empty checking, erasing, programming, verifying files, protecting, upload operations, etc.

●All the flash operation can be located to specific sectors.

●Support 8-bit, 16-bit, 32-bit flash visit width.

●Support one chip, two chips and four chips programming. As a result the program file doesn’t need to be separated.

2. Other Characters of Flash Programmer

●The programming configuration data can be saved.

●Can read registers before program and test the target.

●Can specify the individual sectors.

●Simple and direct microprocessor register configuration interface.

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Chapter 3 Embedded System Development Basic Labs

3.1 ARM Assembly Instructions Lab 1

3.1.1 Purpose

●Learn how to use Embest IDE for ARM and ARM Software Emulator.

●Use basic ARM instructions.

3.1.2 Lab Equipment

●Hardware: PC

●Software: Embest IDE 2003, Windows 98/2000/NT/XP

3.1.3 Content of the Lab 1

●Introduction to the development environment and learn how to work with registers and memory using LDR/STR MOV, etc instructions.

●Learn the basic arithmetic/logic instructions such as ADD, SUB, LSL, AND, ORR etc.

3.1.4 Principles of the Lab 1

The ARM processor has a total of 37 registers:

●31 general-purpose registers, including a program counter (PC). These registers are 32 bits wide.

●6 status registers. The status registers are also 32-bit wide but only 12-bits are used.

The registers are arranged in partially overlapping banks, with a different register bank for each processor mode. At any time, 15 general-purpose registers (R0 to R14), one or two status registers and the program counter are visible. Here we study only the general registers. The status registers will be studied in Section 3.2.4.

1. ARM General Registers

The general-purpose registers R0-R15 can be split into 3 groups. These groups differ in the way they are banked and in their special-purpose uses:

A)The unbanked registers, R0-R7. This means that each of them refers to the same 32-bit physical register in all processor modes. They are completely general-purpose registers, with no special uses implied by the architecture, and can be used wherever an instruction allows a general-purpose register to be specified.

B)The banked registers, R8-R14. The physical register referred to by each of them depends on the current processor mode. Where a particular physical register is intended, without depending on the current processor mode, a more specific name (as described below) is used. Almost all instructions allow the banked registers to be used wherever a general-purpose register is allowed.

Registers R8 to R12 have two banked physical registers each. One is used in all processor modes other than FIQ mode, and the other is used in FIQ mode. Where it is necessary to be specific about which version is being referred to, the registers of the first group are referred to as R8_usr to R12_usr and the second group as R8_fiq to R12_fiq. Registers R8 to R12 do not have any dedicated special purposes in the architecture. However, for interrupts that are simple enough to be processed using registers R8 to R14 only, the existence of separate FIQ mode versions of these registers allows very fast interrupt processing.

Registers R13 and R14 have six banked physical registers each. One is used in User and System modes, while each of the remaining five is used in one of the five exception modes. Where it is necessary to be specific about

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