Файл: Microcontroller Programming. Thi Micro Chip PIC (Julio Sanchez, 2007).pdf

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Supplementary Programs

721

retlw 'i' retlw 'v' retlw 'i' retlw 'n' retlw 'g' retlw ':' retlw 0

;========================

;blank buffer ;========================

;Procedure to store 20 blank characters in PIC RAM

;buffer starting at address stored in the variable

;bufAdd

blank20:

movlw

D'20'

;

Setup counter

movwf

count1

movf

bufAdd,w ;

First PIC RAM address

movwf

FSR

;

Indexed addressing

movlw

0x20

;

ASCII space character

storeit

movwf

INDF

;

Store blank character in PIC RAM

;

buffer using FSR register

decfsz

count1,f

; Done?

goto

incfsr

; no

return

; yes

incfsr

incf

FSR,f

;

Bump FSR to next buffer space

goto

storeit

;============================================================== ; communications procedures ;==============================================================

;Initialize serial port for 2400 baud, 8 bits, no parity,

;1 stop

InitSerial:

Bank1

; Macro to select bank1

;Bits 6 and 7 of Port C are multiplexed as TX/CK and RX/DT

;for USART operation. These bits must be set to input in the

;TRISC register

movlw

b'11000000'

; Bits for TX and RX

iorwf

TRISC,f

; OR into Trisc register

; The asynchronous baud rate is calculated as follows:

;

Fosc

;

ABR = -----------

;

S*(x+1)

;where x is value in the SPBRG register and S is 64 if the high

;baud rate select bit (BRGH) in the TXSTA control register is

722

Appendix D

;clear, and 16 if the BRGH bit is set. For setting to 2400 baud

;using a 10Mhs oscillator at a slow baud rate the formula

;is:

;At slow speed (BRGH = 0)

;

10,000,000

10,000,000

;---------- = ----------- = 2,403.84 (0.16% error)

;

64*(64+1)

4160

;

movlw

spbrgVal ;

Value in spbrgVal = 64

movwf

SPBRG

;

Place in baud rate generator

; Setup value: 0010 0000 = 0x20

movlw

0x20

;

Enable transmission and high baud

;

rate

movwf

TXSTA

Bank0

;

Bank 0

; Setup value: 1001 0000 = 0x90

movlw

0x90

;

Enable serial port and continuous

;

reception

movwf

RCSTA

;

clrf

errorFlags; Clear local error flags register

return ;==============================

;transmit data ;==============================

;Test for Transmit Register Empty and transmit data in w SerialSend:

Bank0

;

Select bank 0

btfss

PIR1,TXIF

;

check if transmitter busy

goto

$-1

; wait until transmitter is not busy

movwf

TXREG

; and transmit the data

return

;==============================

;receive data ;==============================

;Procedure to test line for data received and return value

;in w. Overrun and framing errors are detected and

;remembered in the variable errorFlags, as follows:

;

7

6 5 4

3 2

1

0

<== errorFlags

;

--

not used

----

|

|___ overrun

error

;

|______ framing

error

SerialRcv:

clrf

newData ;

Clear new data received register

Bank0

;

Select bank 0

;Bit 5 (RCIF) of the PIR1 Register is clear if the USART

;receive buffer is empty. If so, no data has been received

btfss

PIR1,RCIF

; Check for received data

Supplementary Programs

723

return

; Exit if no data

;At this point data has been received. First eliminate

;possible errors: overrun and framing.

;Bit 1 (OERR) of the RCSTA register detects overrun

;Bit 2 (FERR) of the RCSTA register detects framing error

btfsc

RCSTA,OERR

; Test

for overrun error

goto

OverErr

;

Error handler

btfsc

RCSTA,FERR

;

Test

for framing error

goto

FrameErr ; Error handler

;At this point no error was detected

;Received data is in the USART RCREG register

movf

RCREG,w

; get received data

bsf

newData,7

; Set bit 7 to indicate new data

; Clear error flags

clrf

errorFlags

return

;==========================

;

error handlers

;==========================

OverErr:

bsf

errorFlags,0

; Bit 0 is overrun error

; Reset system

bcf

RCSTA,CREN

; Clear continuous receive bit

bsf

RCSTA,CREN

; Set to re-enable reception

return

;error because FERR framing error bit is set

;can do special error handling here - this code simply clears

;and continues

FrameErr:

bsf

errorFlags,1; Bit 1 is framing error

movf

RCREG,W

; Read and throw away bad data

return

;============================================================

; I2C EEPROM data procedures

;============================================================

;GPRs used in EEPROM-related code are placed in the common

;RAM area (from 0x70 to 0x7f). This makes the registers

;accessible from any bank.

;============================

; LIST OF PROCEDURES

;============================

; SetupI2C

--- Initialize MSSP module for I2C mode

;

in hardware master mode

;

Configure I2C

lines

;

Set slew rate

for 100kbps

;

Set baud rate

for 10Mhz

; WriteI2C

--- Write byte to

I2C EEPROM device

;

Data is stored in EEByte variable

724

Appendix D

;

Address is

stored in EEMemAdd

; ReadI2C

---

Read byte from I2C EEPROM device

;

Address stored in EEMemAdd

;

Read data returned in w register

;============================

;

I2C setup procedure

;============================

SetupI2C:

Bank1

movlw

b'00011000'

iorwf

TRISC,f

; OR into TRISC

; Setup MSSP module for Master Mode operation

Bank0

movlw

B'00101000'; Enables MSSP and uses appropriate

;

0

0

1

0

1

0

0

0

Value to install

;

7

6

5

4

3

2

1

0

<== SSPCON bits in this operation

;

|

|

|

|

|__|__|__|___

Serial port select bits

;

|

|

|

|

1000 = I2C master mode

;

|

|

|

|

Clock = Fosc/(4*(SSPAD+1))

;

|

|

|

|_______________

UNUSED IN MASTER MODE

;

|

|

|__________________

SSP Enable

;

|

|

1 = SDA and SCL pins as serial

;

|

|_____________________

Receive 0verflow indicator

;

|

0 = no overflow

;|________________________ Write collision detect

;

0 = no collision detected

movwf

SSPCON

; This is loaded into SSPCON

; Input levels

and slew rate

as standard I2C

Bank1

movlw

B'10000000'

;

1

0

0

0

0

0

0

0 Value to install

;

7

6

5

4

3

2

1

0 <== SSPSTAT bits in this operation

;

|

|

|

|

|

|

|

|___

Buffer full status bit READ ONLY

;

|

|

|

|

|

|

|______

UNUSED in present application

;

|

|

|

|

|

|_________

Read/write information READ ONLY

;

|

|

|

|

|____________

UNUSED IN MASTER MODE

;

|

|

|

|_______________

STOP bit READ ONLY

;

|

|

|__________________

Data address READ ONLY

;

|

|_____________________

SMP bus select

;

|

0 = use normal I2C specs

;|________________________ Slew rate control

;

0 = disabled

movwf

SSPSTAT

;Setup Baud Rate

;Baud Rate = Fosc/(4*(SSPADD+1))

;Fosc = 10Mhz

;Baud Rate = 24 for 100 kbps

movlw

.24

; Value to use

Supplementary Programs

725

movwf

SSPADD

; Store in SSPADD

Bank0

return

;============================

;I2C write procedure ;============================

;Write one byte to I2C EEPROM 24LC04B

;Steps:

;

1.

Send

START

;

2.

Send

control. Wait for ACK

;

3.

Send

address. Wait for ACK

;

4.

Send

data. Wait for ACK

;

5.

Send

STOP

; STEP 1:

WriteI2C:

Bank1

bsf

SSPCON2,SEN ; Produce START Condition

call

WaitI2C

; Wait for I2C to complete

;STEP 2:

;Send control byte. Wait for ACK

movlw

LC04READ

; Control byte

call

Send1I2C

; Send Byte

call

WaitI2C

; Wait for I2C to complete

btfsc

SSPCON2,ACKSTAT ; Check ACK bit to see if

; I2C failed, skip if not

goto

FailI2C

;STEP 3:

;Send address. Wait for ACK

Bank0

movf

EEMemAdd,w

; Load Address Byte

call

Send1I2C

; Send Byte

call

WaitI2C

; Wait for I2C operation to complete

Bank1

btfsc

SSPCON2,ACKSTAT ; Check ACK Status bit to see

; if I2C failed, skip if not

goto

FailI2C

;STEP 4:

;Send data. Wait for ACK Bank0

movf

EEByte,w

; Load Data Byte

call

Send1I2C ; Send Byte

call

WaitI2C ; Wait for I2C operation to complete

Bank1

btfsc

SSPCON2,ACKSTAT ; Check ACK Status bit to see

; if I2C failed, skip if not

goto

FailI2C

; STEP 5:

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