Файл: Microcontroller Programming. Thi Micro Chip PIC (Julio Sanchez, 2007).pdf

the main processing routines are developed, make the necessary modifications so as to make possible the 4-bit data mode.

In addition to the data transmission mode, there are other circuit options to be considered. Two control lines between the microcontroller and the HD44780-driven LCD are necessary in all cases: one to the RS line to select between data and instruction input modes, and another one to the E line to provide the pulse that initiates the data transfer. The R/W control line, which selects between the read and the write mode of the LCD controller, can be connected or grounded. If the R/W line is not connected to a microcontroller port, then the HD44780 operates only in the write data mode and all read operations are unavailable.

13.1.1 Busy Flag or Timed Delay Options

Since many applications do not read text data from controller memory, the write-only mode is often an attractive option, especially considering that microcontroller I/O ports are often in short supply and that this option saves one port for other duties. However, there is a less apparent drawback to not being able to read LCD data, which is that the application is not able to monitor the busy flag. This flag, which indicates that the controller has concluded its operation, is mapped to bit 7. Since testing the BF requires reading this bit, not connecting the R/W line has the effect that applications cannot use the busy flag and must rely on timing routines to ensure that each operation completes before the next one begins. The timing requirements for each instruction are listed in the rightmost column in Table 13.3. The subjects of timing and delay routines are discussed in detail later in this chapter.

For the circuit designer, to read or not to read controller data is a decision with several tradeoffs. Using time delay routines to ensure that each controller operation has concluded is a viable option that saves one interface line. On the other hand, code that relies on timing routines is externally dependent on the clocks and timer hardware. If code that relies on timing routines is ported to another circuit with a different microcontroller, clocks, or timer hardware, the delays may change and the routines could fail. Furthermore, the use of delay routines often is not efficient, since controller operations can terminate before the timed delay has expired.

On the other hand, code that reads the busy flag to determine the termination of a controller operation is not without dangers. If the controller or the circuit fails, then the program can hang up in an endless loop, waiting for the busy flag to clear. To be absolutely safe, the code would have to contain an external wait loop when testing the busy flag, so that if the external loop expires, then the processing can assume that there is a hardware problem and break out of the flag test loop. The programmer must decide whether this safety mechanism for reading the busy flag is necessary since its implementation requires a somewhat complicated exception response.

In the code samples developed in this chapter, we implement both ways of ensuring operation completion. The code also furnishes a software switch that allows selecting the preferred option.

13.1.2 Contrast Control

In addition to the control lines that require processor interface, the HD44780 contains other control lines. One such line is used for the LCD contrast. The contrast control line (usually labeled Vee) is connected to pin number 3 (see Table 13.1). The actual implementation of the contrast control function varies according to the manufacturer.

In general, for an LCD with a normal temperature range, the contrast control line is wired as shown in Figure 13-3.

HD44780

1

14

+5 V

10K Ohm

Figure 13-3 Typical Contrast Adjustment Circuit

13.1.3 Display Backlight

Some LCDs are equipped with a LED backlight so as to make the displayed characters more visible. In different LCDs, backlight is implemented in different ways. Some manufacturers wire the backlight directly to the LCD power supply, while others provide additional pins that allow turning the backlight on or off independently of the LCD display. Backlit displays with 14 pins belong to the first type, while those with 16 pins have independent backlight control. If the backlight pins are adjacent to the other display pins, then they are numbered 15 and 16. In this case pin number 15 is wired, through a current limiting resistor, to the +5V source and pin 16 to ground. Sometimes the current-limiting resistor is built into the display. This information is available in the device’s data sheet.

Note that some 4-line displays use pins 15 and 16 for other purposes. In these systems, backlight control, if available, is provided by separate pins.

13.1.4 Display Memory Mapping

The Hitachi HD44780 is a memory-mapped system in which characters are displayed by storing their ASCII codes in the corresponding memory address associated with each digit-display area. The area of controller RAM mapped to character-display memory has a capacity of 80 characters. This area is known as display data RAM or

DDRAM.

In order to save circuitry, the common lines of the controller outputs to the liquid crystal display hardware are multiplexed. In this context, the duty ratio of a system is the number of multiplexed common lines. The most common duty ratio is 1/16, although 1/8 and 1/11 are found in some systems. Since the duty ratio measures the number of multiplexed lines, it also determines the display mapping. For example, in a single-line-by-16 character display with a 1/16 duty ratio the first eight characters are mapped to one set of consecutive memory addresses and the second eight characters to another set of addresses. The reason is that in every display line, sixteen common access lines are multiplexed, instead of eight. By the same token, a two-line-by-sixteen character display with a 1/16 duty ratio requires 16 common lines. In this case, the address of the second lines is not a continuation of the address of the first line, but is in another address set not contiguous to the first one.

For example, in a typical two-line-by-sixteen character display, the addresses of the 16 characters in the first line are from 0x00 to 0x0F, while the addresses of the characters in the second line are from 0x40 to 0x4F. Since there are 80 memory locations in the controller’s DDRAM, each line contains storage for a total of 40 characters. The range of the entire first line is from 0x00 to 0x27 (40 characters total) but of these, only 16 are actually displayed. The same applies to the second line of 16 characters. In this case, the storage area is in the range 0x28 to 0x4f, but only 16 characters are displayed. In the single-line-by-sixteen character display mentioned first the addresses of the first eight characters would be a set from 0x00 to 0x07 and the addresses of the second eight characters in the line are from 0x40 to 0x47. Table 13.2 lists the memory address mapping of some common LCD configurations.

Table 13.2

7-bit DDRAM Address Mapping for Common LCDs

Note that systems that exceed a total of 80 characters require two or more HD44780 controllers. Although the information provided in Table 13.3 corresponds to the mapping in most LCDs, it is a good idea to consult the data sheet of the specific hardware in order to corroborate the address mapping in a particular device.

Table 13.3 contains the seven low-order bits of DDRAM addresses. HD44780 commands to set the DDRAM address for read or write operations require that the high-order bit (bit number 7) be set. Therefore, to write to DDRAM memory address 0x07, code uses the value 0x87, and to write to DDRAM address 0x43, code uses 0xc3 as the instruction operand.

13.2 HD44780 Instruction Set

The HD44780 instruction set includes operators to initialize the system and set operational modes, clear the display, manipulate the cursor, set, reset, and control automatic display address shift, set and reset the interface parameters, poll the busy flag, read and write to CGRAM and DDRAM memory.

13.2.1 Instruction Set Overview

Pin number 4 in Table 13.1 selects two modes of operation on the HD44780 controller: instruction and data input. When the instruction mode is enabled (RS pin is set low) the controller receives commands that set up the hardware and determine its configuration and mode of operation. These commands are part of the HD44780 instruction set shown in Table 13.3.

Table 13.3

HD44780 Instruction Set

Note: Bits labeled # have no effect.

Clearing the Display

Clearing the display clears the display with blanks by writing the code 0x20 into all DDRAM addresses. It also returns the cursor to the home position (top-left display corner) and sets address 0 in the DDRAM address counter. After this command executes, the display disappears and the cursor goes to the left edge of the display.

Return home

Return home returns the cursor to home position at the upper left position of the first character line. It sets DDRAM address 0 in the address counter and sets the display to its default status if it was shifted. DDRAM contents remain unchanged.

Entry mode set

Entry mode set sets the direction of cursor movement and the display shift mode. If B1 (I/D) bit is set, cursor handling is set to the increment mode, that is, left-to-right. If this bit is clear, then cursor movement is set to the decrement mode, that is, right-to-left.

If B0 (S) bit is set, display shift is enabled. In the display shift mode, it appears as if the display moves instead of the cursor; otherwise display shift is disabled. Operations that read or write to CGRAM and operations that read DDRAM do not shift the display.

Display and Cursor ON/OFF

If B2 (D) bit is set, display is turned on. Otherwise, it is turned off. When the display is turned off data in DDRAM is not changed.

If B1 (C) bit is set, the cursor is turned on. Otherwise, it is turned off. Operations that change the current address in the DDRAM Address register, like those to automatically increment or decrement the address, are not affected by turning off the cursor. The cursor is displayed at the eighth line in the 5 x 8 character matrix.

If B0 (B) bit is set, the character at the current cursor position blinks. Otherwise, the character does not blink. Note that character blinking and cursor are independent operations and that both can be set to work simultaneously.

Cursor/display shift

Cursor/display shift moves the cursor or shifts the display according to the selected mode. The operation does not change the DDRAM content. Since the cursor position always coincides with the value in the Address register, the instruction provides software with a mechanism for making DDRAM corrections or to retrieve display data at specific DDRAM locations. Table 13.4 lists the four available options: