Файл: Real-time processing with the Philips LPC ARM mcu using GCC and uCOS II RTOS (D.W. Hawkins, 2006).pdf

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AR1803

May 10, 2006

and an implementation

/ l e d . c

/

#include

” l e d . h”

#define IOSET1 ( ( ( volatile unsigned long ) 0 xE0028014 ) ) #define IODIR1 ( ( ( volatile unsigned long ) 0 xE0028018 ) ) #define IOCLR1 ( ( ( volatile unsigned long ) 0xE002801C ) )

void

l e d

i n i t ( )

{

/ Define

t he

LED pin s

P1 . [ 1 6 . . 2 3 ] as ou t pu t /

IODIR1 = 0x00FF0000 ;

/ Clear a l l pin s /

}

IOCLR1 = 0x00FF0000 ;

void l e d ( unsigned

long v a l )

{

/ LEDs o f f /

IOCLR1 =

( ˜ v a l

& 0xFF ) << 1 6 ;

/ LEDs on /

}

IOSET1 =

( v a l

& 0xFF ) << 1 6 ;

void

l e d

s e t ( unsigned long

s e t )

{

IOSET1 =

( s e t

& 0xFF ) << 1 6 ;

}

void

l e d

c l r ( unsigned long

c l r )

{

IOCLR1 =

( c l r

& 0xFF ) << 1 6 ;

}

Board control functions, such as LED control, are reusable in multiple projects, and they are usually collected into a library referred to as a board-support package (BSP). In the following examples, the compiler arguments are simplified by just linking directly with the LED functions, but keep in mind that the creation of a BSP is preferred.

The startup, main, and LED code (if located in the current directory) can be compiled using

arm-elf-gcc -O2 -mcpu=arm7tdmi -nostartfiles -Ttext=0 \ ex3_start.s ex3a_main.c led.c -o ex3a.elf

and then disassembled using arm-elf-objdump -d ex3a.elf

11


AR1803

May 10, 2006

to give the main code assembler

00000030 <main>:

30:

e1a0c00d

mov

ip, sp

34:

e92dd800

stmdb

sp!, {fp, ip, lr, pc}

38:

e24cb004

sub

fp, ip, #4

; 0x4

3c:

eb000002

bl

4c

<led_init>

40:

e3a00055

mov

r0, #85 ; 0x55

44:

eb000006

bl

64

<led>

48:

eafffffe

b

48

<main+0x18>

The main routine starts by loading the inter-procedure call register with the stack pointer, and stores four registers to the stack. The registers are; the frame pointer, the inter-procedure call pointer, the link register, and the program counter. The ARM Procedure Calling Standard (APCS) [3], and the GCC Using as manual have details on the registers and their use in a C environment. The main code then adjusts the frame pointer, and calls the LED initialization routine (which sets the LED I/O pins to output mode, and outputs a logic low on each pin, turning the LEDs o ). The value 0x55 is then moved into register r0, as the LED function argument, and a branch to the LED routine is made. When the LED call returns, an infinite loop occurs to end the program. The example contains only a .text section containing 188 bytes (BCh bytes).

To add a little more interest to the LED examples, Example 3(b) adds a delay loop to the main application that blinks the MCB2130 LEDs at approximately once per second. The loop count was determined to be 35000h (using an oscilliscope to measure the LED blink period). The startup routine used for this example does not setup the LPC2138 phase-locked-loop (PLL), so the ARM core operates at 12MHz. Example 5 sets up the PLL and uses an appropriately larger loop delay count.

12


AR1803

May 10, 2006

3.4Examples 4(a), (b), and (c): C programs with .bss, .data, and

.rodata sections

Example 4(a) modifies Example 3(b) to add a static integer vector of length 2 to hold the LED blink values. The uninitialized vector is then initialized in main with the two LED blink values. The main application then drops into a while loop that uses the LED values.

Compilation of the main application

arm-elf-gcc -O2 -mcpu=arm7tdmi -c ex4a_main.c

followed by a dump of the sections gives

arm-elf-objdump -h ex4a_main.o

ex4a_main.o: file format elf32-littlearm

Sections:

Idx Name

Size

VMA

LMA

File off

Algn

0

.text

00000054

00000000

00000000

00000034

2**2

CONTENTS,

ALLOC, LOAD, RELOC,

READONLY, CODE

1

.data

00000000

00000000

00000000

00000088

2**0

CONTENTS,

ALLOC, LOAD, DATA

2

.bss

00000008

00000000

00000000

00000088

2**2

ALLOC

3

.comment

00000012

00000000

00000000

00000088

2**0

CONTENTS,

READONLY

or alternatively

arm-elf-size ex4a_main.o

text

data

bss

dec

hex filename

84

0

8

92

5c ex4a_main.o

shows that the main code for the application contains an 8-byte .bss section.

Example 4(b) modifies Example 4(a) to use a static integer vector of length 2, and initializes the vector with the two LED blink values. The sections dump shows that there is an 8-byte .data (initialized data) section. Example 4(c) modifies Example 4(a) to use an initialized static const integer vector, this causes an 8-byte .rodata (read-only data) section to be generated (you need to use arm-elf-objdump -h ex4c_main.o to see the .rodata section).

The LPC2138 ARM microcontroller contains 512kB of Flash RAM and 32kB of SRAM. Applications are typically linked to execute from Flash, while modifiable variables and stacks always use SRAM. Executable code is linked to the .text section, while read-only variables are linked to the

.rodata section. Initialized variables (that can also be modified) are linked to the .data section, while uninitialized variables are linked to the .bss section. Although an applications .data section uses SRAM, an area of Flash RAM of equal size is also required, to store the initial values assigned to the SRAM area. The startup routine copies the initial values from Flash to the SRAM .data section addresses before the main application executes and accesses those variables. The startup routine also needs to zero the range of SRAM addresses used by the .bss section.

Examples 4(a), (b), and (c) require a startup routine that performs the C environment setup; copying the .data section initial values from Flash, zeroing the .bss section, and setting up the stack pointer. A linker script is also required. The linker script is used to define the memory map of the processor, eg. location and length of Flash RAM and SRAM, and to define symbols for the

.data section Flash and SRAM addresses, and the .bss section size. The following linker script can be used to compile the examples

13


AR1803

May 10, 2006

/

l p c 2 1 3 8

f l a s h . l d

Linker s c r i p t

f o r

P h i l i p s

LPC2138 ARM m i c r o c o n t r o l l e r

a p p l i c a t i o n s

t h a t

e x e c u t e

from Flash .

/

/ The LPC2138 has 512kB o f Flash , and 32kB SRAM /

MEMORY

{

f l a s h ( rx ) : org = 0 x00000000 , l e n = 0 x00080000 sram ( rw ) : org = 0 x40000000 , l e n = 0 x00008000

}

SECTIONS

{

/

−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−

. t e x t s e c t i o n ( e x e c u t a b l e code )

−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−

/

. t e x t :

{

s t a r t . o ( . t e x t )( . t e x t )

( . g l u e 7 t ) ( . g l u e 7 ) } > f l a s h

. = ALIGN ( 4 ) ;

/ −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−

. r odat a s e c t i o n ( read−on ly ( con s t ) i n i t i a l i z e d v a r i a b l e s )

−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−

/

. r o d a t a :

{

( . r o d a t a )

}> f l a s h

. = ALIGN ( 4 ) ;

/ End−of−t e x t

symbols /

e t e x t =

. ;

PROVIDE

( e t e x t

= . ) ;

/ −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−

. data s e c t i o n ( read / w r i t e i n i t i a l i z e d v a r i a b l e s )

−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−

The

v a l u e s

o f

t he

i n i t i a l i z e d

v a r i a b l e s are

s t o r e d

in

Flash ,

and

t he

s t a r t u p

code

c o p i e s them

t o

SRAM.

The

v a r i a b l e s

are

s t o r e d

in Flash s t a r t i n g

at

e t e x t ,

14


AR1803

May 10, 2006

and are copied t o SRAM addr es s

d a t a t o

e d a t a .

/

. data : AT ( e t e x t )

{

d a t a = . ;

( . data )

}> sram

. = ALIGN ( 4 ) ;

e d a t a =

. ;

PROVIDE

( edata = . ) ;

/ −−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−

. b s s s e c t i o n ( u n i n i t i a l i z e d v a r i a b l e s )

−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−−

These

symbols d e f i n e t he range o f a d d r e s s e s in SRAM t h a t

need

t o

be z er oed .

/

. b s s :

{

b s s

= .

;

( . b s s )

(COMMON)

}> sram

. = ALIGN ( 4 ) ; e b s s = . ;

end = . ;

PROVIDE ( end = . ) ;

/ S t abs debu ggin g s e c t i o n s .

/

. s t a b

0

: { ( . s t a b ) }

. s t a b s t r

0

: { ( . s t a b s t r ) }

. s t a b . e x c l

0

: { ( . s t a b . e x c l ) }

. s t a b . e x c l s t r

0

: { ( . s t a b . e x c l s t r ) }

. s t a b . i n d e x

0

: { ( . s t a b . i n d e x ) }

. s t a b . i n d e x s t r 0 : { ( . s t a b . i n d e x s t r ) }

. comment

0

:

{

( . comment ) }

/ DWARF debug

s e c t i o n s .

Symbols

in t he

DWARF

debu ggin g

s e c t i o n s

are r e l a t i v e t o t he begin n in g

o f t he

s e c t i o n

so

we

begin

them

at 0 .

/

/ DWARF 1

/

: {

( . debug ) }

. debug

0

. l i n e

0

: { ( . l i n e ) }

/ GNU DWARF 1

e x t e n s i o n s /

. d e b u g

s r c i n f o

0

: { ( . d e b u g

s r c i n f o ) }

. debug

sfnames 0 : { ( . debug

sfnames ) }

/ DWARF 1.1 and DWARF 2

/

. d e b u g

a r a n g e s

0

: { ( . d e b u g

a r a n g e s ) }

. debug

pubnames

0

: {

( . debug

pubnames ) }

15