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50 The Quintessential PIC Microcontroller

the Program store (fetched), interpreted and then executed. As any execution memory access will be on the Data store and as each store has its own busses, then the fetch and execution processes can progress in parallel. Thus while instruction n is being fetched, instruction n−1 is being executed. In Fig. 3.3 the instruction codes for both the imminent and current instructions are held in the two Instruction registers IR1 and IR2 respectively. This structure is known as a pipeline, with instructions being fetched into one end and ‘popping out’ into the Instruction decoder at the other end. Figure 3.4 below shows the time line of our 3-instruction exemplar program, quantized in clock cycles. During each clock cycle, except for the first, both a fetch and an execution is proceeding simultaneously.

Time

Fig. 3.4 Parallel fetch and execute streams.

In order to illustrate the sequence in a little more detail, let us trace through our specimen program. We assume that our computer (that is the Program Counter) has been reset to 000h and has just finished the Cycle 1 fetch.

Fetch (Fig. 3.3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cycle 2

•Increment the Program Counter to point to instruction 2.

•Simultaneously move the instruction word 1 down the pipeline (from Instruction register 1 to Instruction register 2).

•Program Counter (001h) to Program address bus.

•The instruction word 2 then appears on the Program data bus and is loaded into Instruction register 1.

Execute (Fig. 3.3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Cycle 2

•The operand address 05h (i.e. NUM_1) to the File Address register and out onto the File address bus.

•The resulting datum at NUM_1 is read onto the File data bus and loaded into the File Data register.

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the annals of software, so we will wrap up our introduction to computing by looking at some slightly more sophisticated examples.

Writing a program is somewhat akin to building a house. Given a known range of building materials, the builder simply puts these together in the right order. Of course there are tremendous skills in all this; poor building techniques lead to houses that leak, are drafty and eventually may fall down!

It is possible to design a house at the same time as it is being built. Whilst this may be quite feasible for a log cabin, it is likely that the final result will not remain rain proof very long, nor will it be economical, maintainable, ergonomic or very pretty. It is rather better to employ an architect to design the edifice before building commences. Such a design is at an abstract level, although it is better if the designer is aware of the technical and economic properties of the available building materials.

Unfortunately much programming is of the ‘on the hoof’ variety, with little thought of any higher-level design. In the software arena this means devising strategies and designing data structures in memory. Again, it is better if the design algorithms keep in mind the materials of which the program will be built; in our case the machine instructions.

At the level of our examples in this chapter, it will be this coding (building) task we will be mostly concerned with. Later chapters will cover more advanced structures which will help this process, and we will get more practice at devising strategies and data structures.

In order to code software we must have a knowledge of the register architecture of the computer/microcontroller and of the individual instructions. Figure 3.5 shows the programming model we will use for our exercises. This shows all registers that can be ‘got at’ by the programmer.

I have added three registers to the previous complement that actually are part of the Data store rather than the CPU but have a special significance for the programmer. File 0 and File 4 are a pair of Address registers working in tandem to point to an object in memory, as described further on in Fig. 3.6. The Status Register6 STATUS comprises two bits in File 3 that are used to tell the software something about the outcome from an instruction. Thus the C flag (bit 0 in File 3) primarily holds the Carry out from the last Addition operation. For instance (in decimal) 5 + 2 = 7C0; 5 +9 = 4C1. It also functions as the complement of the Borrow out from a Subtraction operation. For example 5 − 2 = 3B1; 5 − 9 = 6B0. The Z flag (bit 2 in File 3) is set if the result of the last operation is zero.

Table 3.1 shows all the instructions supported by the BASIC computer. Before looking at these, let us discuss the concept of the address mode. Most instructions act on data, which may be in internal CPU registers or out in the Data store. Thus the location of such operands must be part of the instruction. It isn’t su cient to simply state clr – Clear what? There

6Some processors use the term Code Condition register.

3. Stored Program Processing 53

Table 3.1: Our BASIC computer’s instruction set.

Skip and Jump

54 The Quintessential PIC Microcontroller

F0

Indirect Pointer register

F4

File Select register

Address register pair

2 0

Z C

Status register (F3)

Fig. 3.5 Programmer’s model.

are di erent ways of specifying the operand location. These are known as address modes.

Inherent

A few instructions, not shown in Table 3.1, do not explicitly refer to any location. For example return for RETURN from subroutine..

Register Direct

Here the operand is specified to be in the Working register. For example:

Most instructions specify at least one operand should be in W. In many cases W can be both a source and the destination operand. For instance:

addwf f,w ; Add W to a file and put the answer in W

where W initially holds one of the two source datum bytes, and ends up holding the outcome datum.

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Program 3.1 Clearing a block of files the linear way.

way to do this is shown in Program 3.1, which uses a clrf instruction for each byte. Although it works, it is rather ine cient, and the mind boggles if you wanted to clear, say, a 1 Kbyte File store. There has got to be a better way!

File Indirect

Indirect addressing uses an address register to hold the address of an operand. This address register thus acts as a pointer into the Program store. The term indirect is used as this address register does not hold the operand datum itself, only a pointer address to it. The advantage of this seemingly perverse way of accessing data in the Data store, is that the e ective address (ea) is a variable and this can be altered by the program as it progresses. This ea is the contents of this special pointer address register.

In our BASIC computer the File Select Register (FSR) is implemented as File 4 in the File store. The indirect mechanism is evoked when the dummy address File 0 (there is no physical file at location 0 in the Data store) is used for the operand address, as shown in Fig. 3.6.7 Thus, for example, if the contents of File 4 happened to be 20h then:

movwf 0 ; Store datum in W out to place pointed to by File 4

will e ectively copy the contents of W out to File 20h.

This seems rather an obscure way of doing things, but by way of a justification let us revisit our array clearing example of Program 3.1. Repeating the same thing 52 times on successive file locations is a dubious way of doing this. Why not use a pointer into the array, and increment this pointer each time we do a Clear? That is, rather than using a constant address for the destination operand use a variable e ective address.

Program 3.2 follows the scheme by folding the linear structure of the previous program into a loop, shown shaded. The execution path keeps

7Although this all seems rather complicated, I have kept in mind the microcontroller that we will be examining in the following chapters.