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System Description

 

 

Wireless Power Transfer

 

 

Table of Contents

Version 1.1 Addendum B4

List of Figures

 

 

Figure 1-1: Bit positions in a byte .....................................................................................................................................................

 

2

Figure 1-2: Example of multiple-bit field.......................................................................................................................................

 

3

Figure 2-1: Functional block diagram of Power Transmitter design B4..........................................................................

 

5

Figure 2-2: Top view of PCB and wire-wound Primary Coil of Power Transmitter design B4..............................

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Figure 2-3: Top view (a) and cross section (b) of the Primary Coilarray of Power Transmitter design B4. ...

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Figure 2-4: Layered structure of the Primary Coil array ........................................................................................................

 

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Figure 2-5: Primary Coil array assembly of Power Transmitter design B4....................................................................

 

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Figure 2-6: Electrical diagram (outline) of Power Transmitter design B4 .....................................................................

 

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Figure 2-7: Control signals to the inverter .................................................................................................................................

 

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© Wireless Power Consortium, May 2012

System Description

 

Wireless Power Transfer

 

Version 1.1 Addendum B4

Table of Contents

List of Tables

 

Table 2-1: Primary Coil parameters of Power Transmitter design B4.............................................................................

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Table 2-2: Primary Coil array parameters of Power Transmitter design B4.................................................................

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Table 2-3: Control parameters for power control...................................................................................................................

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© Wireless Power Consortium, May 2012

iii


 

System Description

 

Wireless Power Transfer

Table of Contents

Version 1.1 Addendum B4

This page is intentionally left blank.

iv

© Wireless Power Consortium, May 2012


 

System Description

 

Wireless Power Transfer

Version 1.1 Addendum B4

General

1 General

1.1Scope

Volume I of the System Description Wireless Power Transfer consists of the following documents:

Part 1, Interface Definition.

Part 2, Performance Requirements.

Part 3, Compliance Testing.

This document defines the addition of a new Power Transmitter design. The material contained in this document will be integrated into Part 1 of Volume I of the System Description Wireless Power Transfer, at some later time.

1.2Conformance and references

All specifications in this document are mandatory, unless specifically indicated as recommended or optional or informative. To avoid any doubt, the word “shall” indicates a mandatory behavior of the specified component, i.e. it is a violation of this System Description Wireless Power Transfer if the specified component does not exhibit the behavior as defined. In addition, the word “should” indicates a recommended behavior of the specified component, i.e. it is not a violation of this System Description Wireless Power Transfer if the specified component has valid reasons to deviate from the defined behavior. And finally, the word “may” indicates an optional behavior of the specified component, i.e. it is up to the specified component whether to exhibit the defined behavior (without deviating there from) or not.

In addition to the specifications provided in this document, product implementations shall also conform to the specifications provided in the System Descriptions listed below. Moreover, the relevant parts of the International Standards listed below shall apply as well. If multiple revisions exist of any System Description or International Standard listed below, the applicable revision is the one that was most recently published at the release date of this document. Moreover, if there exist addendum documents to the applicable revision, such addendum documents are considered to be an integral part of that applicable revision.

[Part 1]

System Description Wireless Power Transfer, Volume I, Part 1, Interface

 

Defintion.

[Part 2]

System Description Wireless Power Transfer, Volume I, Part 2, Performance

 

Requirements.

[Part 3]

System Description Wireless Power Transfer, Volume I, Part 3, Compliance

 

Testing.

[SI]

The International System of Units (SI), Bureau International des Poids et

 

Mesures.

1.3Definitions

This document introduces no new definitions to the System Description Wireless Power Transfer.

1.4Acronyms

This document introduces no new acronyms to the System Description Wireless Power Transfer.

1.5Symbols

This document introduces no new symbols to the System Description Wireless Power Transfer.

© Wireless Power Consortium, May 2012

1



 

System Description

 

Wireless Power Transfer

General

Version 1.1 Addendum B4

1.6Conventions

This Section 1.6 defines the notations and conventions used in this System Description Wireless Power Transfer.

1.6.1Cross references

Unless indicated otherwise, cross references to Sections in either this document or documents listed in Section 1.2, refer to the referenced Section as well as the sub Sections contained therein.

1.6.2Informative text

With the exception of Sections that are marked as informative, all informative text is set in italics.

1.6.3Terms in capitals

All terms that start with a capital are defined in Section 1.3. As an exception to this rule, definitions that already exist in [Part 1], [Part 2], or [Part 3], are not redefined.

1.6.4Notation of numbers

Real numbers are represented using the digits 0 to 9, a decimal point, and optionally an exponential part. In addition, a positive and/or negative tolerance may follow a real number. Real numbers that do not include an explicit tolerance, have a tolerance of half the least significant digit that is specified.

(Informative) For example, a specified value of

comprises the range from 1.21 through 1.24; a

specified value of

comprises the range from 1.23 through 1.24; a specified value of

comprises the range from 1.21 through 1.23; a specified value of 1.23 comprises the range from 1.225 through 1.234999…; and a specified value of comprises the range from 1.107 through 1.353.

Integer numbers in decimal notation are represented using the digits 0 to 9.

Integer numbers in hexadecimal notation are represented using the hexadecimal digits 0 to 9 and A to F, and are preceded by “0x” (unless explicitly indicated otherwise).

Single bit values are represented using the words ZERO and ONE.

Integer numbers in binary notation and bit patterns are represented using sequences of the digits 0 and 1that are enclosed in single quotes (‘’). In a sequence of n bits, the most significant bit (msb) is bit bn–1 and the least significant bit (lsb) is bit b0; the most significant bit is shown on the left-hand side.

1.6.5Units of physical quantities

Physical quantities are expressed in units of the International System of Units [SI].

1.6.6Bit ordering in a byte

The graphical representation of a byte is such that the msb is on the left, and the lsb is on the right. Figure 1-1 defines the bit positions in a byte.

msb

 

 

 

 

 

 

lsb

 

 

 

 

 

 

 

 

b7

b6

b5

b4

b3

b2

b1

b0

 

 

 

 

 

 

 

 

Figure 1-1: Bit positions in a byte

1.6.7Byte numbering

The bytes in a sequence of n bytes are referred to as B0, B1, …, Bn–1. Byte B0 corresponds to the first byte in the sequence; byte Bn–1 corresponds to the last byte in the sequence. The graphical representation of a byte sequence is such that B0 is at the upper left-hand side, and byte Bn–1 is at the lower right-hand side.

1.6.8Multiple-bit Fields

Unless indicated otherwise, a multiple bit field in a data structure represents an unsigned integer value. In a multiple-bit field that spans multiple bytes, the msb of the multiple-bit field is located in the byte with

2

© Wireless Power Consortium, May 2012