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SN54/74LS00

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

AC CHARACTERISTICS (TA = 25°C)

FIGURE 11.3

74LS00 Data (2 of 2) Reprinted with permission of Motorola.

Solution When the output is in the LOW state, the output current is given by IOL, which has a maximum value of 8 mA. The output voltage, VOL, is specified for a value of 4 mA and for 8 mA. Since the output condition is specified for maximum IOL (8 mA),

502 C H A P T E R 1 1 • Logic Gate Circuitry

The 74XX00 NAND gate data is sufficient to represent any logic functions having “normal” output current within its particular logic family. This data can be used for most gate or flip-flop circuits within the family. Some specialized devices with higher-current outputs (e.g., 74XX244 octal tristate buffers) have a different set of electrical characteristics within their family.

In the following sections of the chapter, we will use a NAND gate from each of three device families (74LS00, 74HC00A, and 74HCT00A) for illustrating the general principles of the various electrical characteristics. Devices from other families will also be used in examples and problems. Data sheets for the various devices are included in Appendix C.

SECTION 11.1 REVIEW PROBLEM

11.1What are the maximum values of voltage and current we can expect at the output of a 74LS00 NAND gate when both inputs are LOW?

11.2Propagation Delay

K E Y T E R M S

Propagation delay occurs because the output of a logic gate or flip-flop cannot respond instantaneously to changes at its input. There is a short delay, on the order of several nanoseconds, between input change and output response. This is largely due to the charging and discharging of capacitances inherent in the switching transistors of the gate or flipflop.

Figure 11.4 shows propagation delay in two gates: a 74XX00 NAND gate and a 74XX08 AND gate. Each gate has an identical input waveform, a LOW-HIGH-LOW pulse. After each input transition, the output changes after a short delay, tp.

FIGURE 11.4

Propagation Delay in NAND and AND Gates

Two delays are shown for each gate: tpLH and tpHL. The LH and HL subscripts show the direction of change at the gate output; LH indicates that the output goes from LOW to

HIGH, and HL shows the output changing from HIGH to LOW.

Propagation delay is the time between input and output voltages passing through a standard reference value. The reference voltage for standard TTL is 1.5 V. LSTTL and CMOS have different reference voltages, as follows.

N O T E

Propagation Delay for Various Logic Families:

LSTTL: Time from 1.3 V at input to 1.3 V at output.

Other TTL: Time from 1.5 V at input to 1.5 V at output.

CMOS: Time from 50% of maximum input to 50% of maximum output.

*Temperature range (74F00): 0°C to 70°C.

**VCC 4.5 V, temperature range (74HC00): 55°C to 25°C.

***VCC 5 V, temperature range (74HCT00): 55°C to 25°C.

As indicated by the notes for Table 11.3, propagation delay (and other parameters) vary with certain operating conditions, such as ambient temperature and power supply voltage. Always make sure that the operating conditions are correctly specified when looking up a data sheet parameter.

All gates in Example 11.3 have the same logic function (2-input NAND), but different propagation delay times. We might ask, “Why not always use the advanced Schottky TTL gate (74AS00), since it is the fastest?” The main reason is that it has the highest power dissipation of the gates shown. We wouldn’t know this without looking up other specs on the data sheet. (We will learn how to do this later in the chapter.) Thus, it is important to make design decisions based on complete information, not just one parameter.