Файл: Introduction to microcontrollers (G. Gridling, 2006).pdf
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42 |
CHAPTER 2. MICROCONTROLLER COMPONENTS |
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b r−1 |
2R |
V |
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R |
o |
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2R |
R |
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b 1 |
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2R |
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b 0 |
2R |
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Figure 2.15: Digital-to-analog conversion based on an R-2R resistor ladder.
V1 +
O
V2 −
Figure 2.16: Analog comparator.
feature an analog module include an analog comparator. Comparators are a bit like digital inputs, but without a Schmitt-trigger and with a configurable threshold. The analog comparator has two analog inputs and one (digital) output, see Figure 2.16. It simply compares the two input voltages V1 and V2 and sets its output to 1 if V1 > V2. For V1 ≤ V2, the output is set to 0.
The input voltages are either both from external analog signals, or one of them is an external signal and the other is an internally generated reference voltage. The output of the comparator can be read from a status register of the analog module. Furthermore, controllers generally allow an interrupt to be raised when the output changes (rising edge, falling edge, any edge). The ATmega16 also allows the comparator to trigger an input capture (see Section 2.6.2).
Like digital inputs, comparator outputs suffer from meta-stability. If the two compared voltages are close to each other and/or fluctuate, the comparator output may also toggle repeatedly, which may be undesired when using interrupts.
2.4.3Analog/Digital Conversion
If the voltage value is important, for example if we want to use our photo transistor to determine and display the actual brightness, a simple comparator is not sufficient. Instead, we need a way to represent the analog value in digital form. For this purpose, many microcontrollers include an analog-to-digital converter (ADC) which converts an analog input value to a binary value.
Operating Principle
2.4. ANALOG I/O |
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code |
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111 |
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110 |
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101 |
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100 |
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011 |
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010 |
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001 |
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000 |
Vref /8 |
Vin |
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= 1 lsb |
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code |
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Vref |
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111 |
7 lsb |
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110 |
6 lsb |
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101 |
(2) |
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011 |
3 lsb |
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010 |
(1) |
2 lsb |
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001 |
(1) |
1 lsbVref /16 |
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000 |
2τs |
3τs 4τs |
t |
=0.5 lsb |
τs |
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(b) |
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Figure 2.17: Basic idea of analog to digital conversion (r = 3, GND=0). (a) Mapping from analog voltage to digital code words, (b) example input and conversion inaccuracies.
Figure 2.17 (a) shows the basic principle of analog-to-digital conversion. The analog input voltage range [GND, Vref ] is parted into 2r classes, where r is the number of bits used to represent the digital value. Each class corresponds to a digital code word from 0 to 2r − 1. The analog value is mapped to the representative of the class, in our case the midpoint, by the transfer function. We call r the resolution, but you will also find the term word width in the literature. Typical values for r are 8 or 10 bits, but you may also encounter 12 bit and more. The lsb of the digital value represents the smallest voltage difference Vref /2r that can be distinguished reliably. We call this value the granularity of the a/d converter, but you will often find the term resolution in the literature6. The class width of most classes corresponds to 1 lsb, with the exceptions of the first class (0.5 lsb) and the last class (1.5 lsb). This asymmetry stems from the requirement that the representative of the code word 0 should correspond to 0 V, so the first class has only half the width of the other classes, whereas the representative of the code word 2r − 1 should be Vref − 1 lsb to allow easy and compatible expansion to more bits. To avoid the asymmetry, we could for example use the lower bound of the class as its representative. But in this case, the worst case error made by digitization would be +1 lsb. If we use the midpoint, it is only ± 0.5 lsb.
As you can see in Figure 2.17 (b), the conversion introduces some inaccuracies into the microcontroller’s view of the analog value. First of all, the mapping of the analog value into classes results in information loss in the value domain. Fluctuations of the analog value within a class go unnoticed, e.g. both points (1) in the figure are mapped to the same code word 001. Naturally, this situation can be improved by reducing the granularity. One way to achieve this is to make r larger, at the cost of a larger word width. Alternatively, the granularity can be improved by lowering Vref , at the cost of a smaller input interval.
Secondly, the conversion time, which is the time from the start of a conversion until the result of this conversion is available, is non-zero. In consequence, we get a certain minimum sampling period
6Actually, “resolution” is used very frequently, whereas “granularity” is not a term generally used, it is more common in clock synchronization applications. But to avoid confusion with the resolution in the sense of word width, we decided to employ the term granularity here as well.
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CHAPTER 2. MICROCONTROLLER COMPONENTS |
τs between two successive conversions, resulting in an information loss in the time domain7. Changes of the value between two conversions are lost, as you can see at point (2) in the figure. The upper bound on the maximum input frequency fmax that can be sampled and reconstructed by an ADC is given by Shannon’s sampling theorem (Nyquist criterion):
fmax < |
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1 |
(2.3) |
2τs |
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The theorem states that the maximum input signal frequency fmax must be smaller than half the sampling frequency fs. Obviously, this implies that for high input frequencies the minimum sampling period τs, which depends on the conversion technique used, should be small.
Figure 2.18 shows a simple a/d converter as a black box. The AVCC and GND pins provide the power supply for the converter. Vref provides the ADC with the maximum voltage used for conversion, and on Vin the measurand is connected to the converter. An enable input and a trigger input to start a new conversion complete the input part of our simple ADC. On the output side, we have the converted value and a signal line which indicates a completed conversion.
AVCC |
b r−1 |
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VREF |
. |
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Vin |
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b 0 |
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SC |
CC |
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EN |
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GND |
Figure 2.18: An ADC as a black box.
In the figure, the maximum voltage Vref , the reference voltage used for defining the conversion interval, is provided on an external pin. However, some controllers also offer an internal reference voltage. The ATmega16, for example, allows the user to choose between an internal 2.56 V reference voltage, the (external) analog power supply voltage AVCC, or an external reference voltage. If the analog input signal is greater than Vref , it is mapped to 2r − 1. More sophisticated a/d converters may indicate such an overflow in a dedicated overflow bit. Likewise, a signal smaller than GND is mapped to the code 0.
Fluctuations of the input signal during a conversion can deteriorate the quality of the result, so in order to keep the input signal stable during conversion, a sample/hold stage is used, see Figure 2.19. At the start of the conversion, the capacitor is charged from the input signal. After a fixed time, it is disconnected from the input signal and is used as input to the ADC itself, ensuring that the voltage remains constant during conversion.
7Note that τs is not necessarily equal to the conversion time: Some converters allow to pipeline conversions, thus achieving a τs that is shorter than the conversion time of a single value.
2.4. ANALOG I/O |
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R |
buffer |
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Vin |
to ADC |
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C |
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Figure 2.19: Sample/hold stage of an a/d converter.
Conversion Techniques
There are several different techniques for analog-to-digital conversion. The simplest one is the flash converter, see Figure 2.20.
Vin |
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msb |
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Vref,2r −1 |
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(2r −1.5 lsb) |
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priority |
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encoder |
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b 0 |
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(0.5 lsb) |
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lsb |
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Figure 2.20: Operating principle of a flash converter.
The idea is very simple: The input voltage Vin is compared to several reference voltages Vref,i,
where |
Vref · (2i − 1) |
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V |
ref,i |
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≤ |
i |
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1. |
(2.4) |
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2r+1 |
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If the input voltage is higher than a particular reference voltage, then its comparator will output 1. All comparator outputs are connected to a priority encoder which will output the binary number that corresponds to the most significant bit that is set in the input value. The lsb of the encoder is connected to 1, so if none of the comparators is active, the encoder will output the code word 0.
With the reference voltages of Equation 2.4, we again get a class width of 0.5 lsb for code 0, a width of 1.5 lsb for code 2r − 2, and widths of 1 lsb for all other classes.
The major advantage of the flash converter, which lends it its name, is its speed: the conversion is done in one step, all possible classes to which the input voltage may correspond are checked simultaneously. So its time complexity is O(1). However, the fast conversion is bought with enormous hardware complexity: 2r −1 comparators are required, and adding just one more bit to the code word doubles the hardware requirements. Therefore, flash converters are rather expensive.
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CHAPTER 2. MICROCONTROLLER COMPONENTS |
A completely different concept is implemented in the tracking converter, see Figure 2.21.
Vin |
+ |
U/D Counter |
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− |
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Vref |
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. |
. |
b r−1 |
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DAC . |
. |
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. |
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b |
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0 |
Figure 2.21: Operating principle of a tracking converter.
This converter is interesting in that it requires a d/a converter to achieve a/d conversion. The principle is again very simple: The heart of the tracking converter is a counter which holds the current digital estimate of the input voltage. The counter value is converted to an analog value by the DAC and compared to the input voltage. If the input voltage is greater than the current counter value, then the counter is incremented, otherwise it is decremented.
Vin
t |
(a) |
Vin
t |
(b) |
Figure 2.22: A tracking converter in action.
As you can see in Figure 2.22 (a), the tracking converter requires a long time until it catches the signal, but once it has found the signal, its conversion time is pretty fast. Unfortunately, this is only true for a slowly changing signal. If the signal changes too fast, as depicted in part (b) of the figure, then the converter again spends most of its time tracking the signal. Only the points where the count direction changes are correct conversion values.
Since the worst case time complexity of the tracking converter is O(2r), it is too slow for many applications.
By slightly changing the operating principle of the tracking converter, we get the successive approximation converter shown in Figure 2.23.
2.4. ANALOG I/O |
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Vin |
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b |
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0 |
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Figure 2.23: Operating principle of a successive approximation converter.
As you can see, the only difference is that the counter was exchanged for a successive approximation register (SAR). The SAR implements a binary search instead of simply counting up or down: When a conversion is started, the msb in the SAR (b2r−1) is set and the resulting analog value is compared to the input voltage. If the input is greater than that voltage, b2r−1 is kept, otherwise it is cleared. Then the next bit b2r−2 is set, and so on, until the last bit. After r comparisons, the value in the SAR corresponds to the input voltage. Figure 2.24 demonstrates the operation.
000 |
reset SAR, start conversion |
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100 |
test bit r−1=2 |
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110 |
010 |
test bit 1 |
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K=1 |
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test bit 0 |
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111 |
101 |
011 |
001 |
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K=1 |
K=0 |
K=1 |
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conversion |
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111 |
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011 |
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001 |
000 |
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finished |
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Figure 2.24: A successive approximation register in action (r=3).
The successive approximation converter with its linear time complexity of O(r) is a good compromise between the speed of the flash converter and the simplicity of the tracking converter. Another advantage over the tracking converter is that its conversion time does not depend on the input voltage and is in fact constant. To avoid errors during conversion due to a changing input signal, a sample/hold stage is required.
Successive approximation converters are commonly used in microcontrollers.