Файл: Introduction to microcontrollers (G. Gridling, 2006).pdf

and can hence be seen as the accumulation of DNLEs. To determine the INLE, manufacturers either use the midpoints of the ideal transfer function as comparison, or they use the device under test (DUT) itself. If the DUT, that is, the tested a/d converter itself, is used, then either a line is drawn through the first and last measured midpoints, or all midpoints are used to determine a best fit line. The INLE is then computed by comparing the measured midpoints to this line.

Usage

Microcontrollers equipped with analog inputs normally offer 4-16 analog input channels which are multiplexed and go to a single internal ADC. In consequence, multiple analog channels cannot be read concurrently but must be read one after the other. In practice, that means that you tell the analog module which channel to use and then start a conversion. After the conversion is finished, you read the value, configure the module for the next channel and trigger the next conversion. Some ADCs allow you to set up the next channel while the current conversion is in progress and take over the new settings as soon as the current conversion is finished. More sophisticated converter ICs even offer an auto-increment feature, so you only set up the first channel and the ADC automatically switches channels with every new conversion.

Starting a conversion can be initiated by the user, but microcontrollers generally have multiple trigger sources for the ADC. Apart from a dedicated pin in the ADC status register which allows the user to trigger a conversion (single conversion mode), most ADCs have a continuous mode in which a new conversion is triggered automatically as soon as the last one is finished. In addition, other sources like the timer, an input capture event, or an external signal may be able to trigger a conversion.

After a conversion has been started, the ADC needs some time to charge its sample/hold stage, and then some more to do the actual conversion. Since microcontrollers generally use successive approximation converters, the conversion time is constant. The first conversion after switching to a new channel may nevertheless take more time because the converter has to re-charge its input stage.

For correct operation, the ADC requires a clock signal that is within a certain range. If the signal is derived from an external clock signal, like in the ATmega16, you have to configure a prescaler to properly divide down the system clock to suit the converter. The prescaled clock is used to drive the converter and thus determines the conversion time. Of course, you may also operate the converter with a frequency that is outside its specified range. If the clock signal is slower than required, the conversion will become unnecessarily long, but there should be no adverse effects on the conversion result. If the clock signal is too fast, however, the accuracy of the conversion suffers, as the lowest bits won’t be correct anymore. The higher the clock frequency, the worse the accuracy will become. If the frequency gets too high, the result may even be completely wrong.

After the conversion is complete, a flag is set in the ADC’s status register. The analog module can also raised an interrupt if desired. The result of a conversion is stored in a data register. Since the ADC resolution may be greater than the microcontroller’s word width, for example when a 10-bit ADC is used on an 8-bit microcontroller, atomic (read) access to the data register becomes important. Normally, controllers offer a mechanism for atomic access, the ATmega16 for example freezes the contents of the data register upon access of the low byte. Updates of the register are then suspended until the high byte is read.

Note that if the voltage value is outside the allowed range, it will be mapped to the bound. So a negative value will be mapped to 0, a value greater than Vref will be mapped to 2r−1. To avoid damage to the analog module, though, the voltage should stay within the limits stated in the controller’s datasheet.

Differential/Bipolar Conversion

Up to now, we have always assumed a single-ended conversion, where the analog input voltage is compared to GND. But sometimes, we are interested in the difference between two input signals and would like to compare them directly. To compare two external analog signals V+ and V−, some ADCs offer differential inputs, where the difference V+ − V− is used as input to the converter.

With differential channels, the question about the range of the input signal arises. Our singleended channels all were unipolar, that is, the input voltage was in the range [GND, Vref ], and the output code was positive in the range of [0, 2r − 1]. A voltage outside the allowed input range was simply mapped to the bound. With differential channels, it may be desirable to have an input range of [−Vref /2, Vref /2] and to allow negative values. As an example, think about a temperature sensor which measures temperatures within [−50, +100]◦C. To calibrate this sensor, you could set up a reference voltage that corresponds to 0◦C and use a differential channel in bipolar mode.

Bipolar mode implies that the conversion input is in the range of [−Vref /2, Vref /2] and hence may be negative. To represent a negative conversion result, ADCs use either two’s complement representation or excess representation.

Excess Representation

You remember the two’s complement representation? There, zero was represented by (0 · · · 0)2, positive numbers were simply represented by their binary form, and negative numbers were derived by inverting the positive number and adding 1. This is one way to represent an integer range within −2n−1, 2n−1 − 1 in n bit.

Another way to represent such a range would be to simply assign (0 · · · 00)2 to the smallest number −2n−1, (0 · · · 01)2 to −2n−1 + 1 and so on, until (1 · · · 11)2 for 2n−1 − 1. Zero would be (10 · · · 0)2. This form of representation is called excess representation.

If we compare the two forms of representation, we find an interesting relationship between them (n = 3):

As you can see, in two’s complement, the most significant bit indicates the sign of the number. Interestingly, it also does so in excess representation, only the sign bit is inverted. So if you want to convert between two’s complement and excess representation, you only have to toggle the sign bit.

Differential inputs sometimes use only a fraction of the available input range of [−Vref /2, Vref /2]. As we have already discussed, a lot of the input range would go to waste while the remaining range would suffer from unnecessarily coarse granularity. To avoid this problem, ADCs offer gain amplification, where the input signal is amplified with a certain gain before it is converted. The ADC

generally offers one or more different gains, but possibly not for all channels. The resulting output code for gain G is given by

where G · (V+ − V−) [−Vref /2, Vref /2].

2.4.4Exercises

In the following exercises, we assume that GND = 0V.

Exercise 2.4.1 Assume that you have an 8-bit ADC with Vref = 5V. What is the granularity of the converter (1 lsb)?

Exercise 2.4.2 Assume that you have an 8-bit ADC with Vref = 5V. Which input voltages are mapped to the code word 0x00? Which voltages are mapped to 0xFF?

Exercise 2.4.3 Assume that you have an 8-bit ADC with Vref = 5V. If the input voltage is 3.5V, what is the resulting code word?

Exercise 2.4.4 Assume that you have an 8-bit ADC with Vref = 5V and bipolar operation. If the inputs are V+ = 1V and V− = 2V, what is the resulting code word? What is the resulting code word if we use unipolar mode?

Exercise 2.4.5 You have an 8-bit ADC with Vref = 5V and a differential input channel. The positive input voltage V+ is in the range [0.99, 1.03]V, the negative voltage V− is within [1.02, 1.025]V. What is the input range of the resulting differential input? What percentage of the full input range does that cover? How large is the quantization error, in percent of the differential input range?

Exercise 2.4.6 Consider the previous exercise. If the ADC offers the gains {2, 5, 10, 20, 50, 100, 200}, which gain would you select? How does your selected gain affect the quantization error (again in percent of the differential input range)?