Analog to Digital and Realtime Clocks |
549 |
movf |
PORTB,w |
; Read all Port-B bits |
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movwf |
store1 |
; Store value for later |
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rrf |
store1,f ; Rotate bit into carry flag |
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rlf |
rcvdata,f |
; Rotate carry flag into result |
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; register |
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decfsz |
bitCount,f |
; Bump counter, skip next |
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; if counter zero |
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goto |
nextB |
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bsf |
PORTB,CLK |
; Final clock pulse |
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Nop |
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bcf |
PORTB,CLK |
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nop |
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bsf |
PORTB,CS ; Turn off ADC |
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call |
long_delay |
; Time to settle |
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Return |
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16.2 PIC On-Board A/D Hardware
A few years ago, A/D conversions always required the use of devices such as the ones described in the previous sections. Nowadays, many PIC microcontrollers come with onboard A/D hardware. One of the advantages of using onboard A/D converters is saving interface lines. The circuit shown in Figure16-4 requires devoting three lines to the interface between the ADC0831 and the PIC 16F84. On the other hand, a similar circuit can be implemented in a PIC with internal A/C conversion by simply connecting the analog device to the corresponding PIC port. In the PIC world, where I/O lines are often in short supply, this advantage is not insignificant.
At the time we are writing, PICs equipped with A/D converters have either 8- or 10-bit resolution and can receive analog input in 2 to 16 different channels. The 16F877 with eight analog input channels at a 10-bit resolution is discussed. Nowadays, these PICs are easy to obtain. On the other hand, if the resolution required exceeds 10-bits then the designer has to resort to an independent A/D IC, such as the LTC1298, which has a 12-bit resolution, or to others with even higher numbers of output bits.
16.2.1 A/D Module on the 16F87x
The PICs of the 16F87x family are equipped with an analog-to-digital converter module. The number of lines depends on the specific version of the device: 28-pin devices have five A/D lines and all others have eight lines. The converter uses a sample and hold capacitor to store the analog charge and performs a successive approximation algorithm to produce the digital result. The converter resolution is 10 bits, which are stored in two 8-bit registers. One of the registers has only four significant bits.
The A/D module has highand low-voltage reference inputs that are selected by software. The module can operate while the processor is in SLEEP mode, but only if the A/D clock pulse is derived from its internal RC oscillator. The module contains four registers accessible to the application:
•ADRESH - Result High Register
•ADRESL - Result Low Register
•ADCON0 - Control Register 0
•ADCON1 - Control Register 1
Of these, it is the ADCON0 register that controls most of the operations of the A/C module. Port-A pins RA0 to RA5 and Port-E pins RE0 to RE2 are multiplexed as analog input pins into the A/C module. In the 28-pin versions of the 16F87x, port pins RA0 to RA5 provide the five input channels. In all other implementations of the 16F87X, Port-E pins RE0 to RE2 provide the three additional channels.
Figure 16-5 shows the registers associated with A/D module operations.
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REGISTER |
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NAME |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
bits |
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INTCON |
GIE |
PEIE |
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PIR1 |
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ADIF |
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PIE1 |
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ADIE |
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ADRESH |
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A/D Result Register High Byte |
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ADRESL |
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A/D Result Register Low Byte |
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ADCON0 |
ADSC1 |
ADSC0 |
CHS2 |
CHS1 |
CHS0 |
GO/DONE |
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ADON |
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ADCON1 |
ADFM |
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PCFG3 |
PCFG2 |
PCFG1 |
PCFG0 |
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Figure 16-5 Registers Related to A/C Module Operations
The ADCON0 Register
The ADCON0 register is located in bank 0, at address 0x1f. Seven of the eight bits are meaningful in A/D control and status operations. Figure 16-6 is a bitmap of the ADCON0 register.
In Figure 16-6, bits 7 and 6, labeled ADSC1 and ADSC0, are the selection bits for the A/D conversion clock. The conversion time per bit is defined as TAD in PIC documentation. A/D conversion requires a minimum of 12 TAD in a 10-bit ADC. The source of the A/D conversion clock is software selected. The four possible options for TAD are:
1.Fosc/2
2.Fosc/8
3.Fosc/32
4.Internal A/D module RC oscillator (varies between 2 and 6 µs)
Analog to Digital and Realtime Clocks |
551 |
bits: |
7 |
6 |
5 |
4 |
3 |
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2 |
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1 |
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0 |
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ADSC1 |
ADSC0 |
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CHS2 |
CHS1 |
CHS0 |
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GO/DONE |
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ADON |
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bit 7-6 ADCS1:ADCS0: A/D Conversion Clock Select bits |
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00 = FOSC/2 |
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01 = FOSC/8 |
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10 = FOSC/32 |
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11 = FRC (internal A/D module RC oscillator) |
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bit 5-3 CHS2:CHS0: Analog Channel Select bits |
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000 |
= channel 0, (RA0=AN0) |
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001 |
= channel 1, (RA1=AN1) |
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010 |
= channel 2, (RA2=AN2) |
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011 |
= channel 3, (RA3=AN3) |
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100 |
= channel 4, (RA5=AN4) |
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101 |
= channel 5, (RE0=AN5) | not active |
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110 |
= channel 6, (RE1=AN6) | in 28-pin |
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111 |
= channel 7, (RE2=AN7) | 16F87x PICS |
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bit 2 GO/DONE: A/D Conversion Status bit |
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If ADON = 1: |
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1 = A/D conversion in progress (setting this |
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bit starts the A/D conversion) |
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0 = A/D conversion not in progress (this bit |
is automatically cleared by hardware when the A/D conversion is complete)
bit 1 Unimplemented: Read as '0' bit 0 ADON: A/D On bit
1 = A/D converter module is operating
0 = A/D converter module is shut-off and consumes no power
Figure 16-6 ADCON0 Register Bitmap
The conversion time is the analog-to-digital clock period multiplied by the number of bits of resolution in the converter, plus the two to three additional clock periods for settling time, as specified in the data sheet of the specific device. The various sources for the analog-to-digital converter clock represent the main oscillator frequency divided by 2, 8, or 32. The third choice is the use of a dedicated internal RC clock that has a typical period of 2 to 6 µs. Since the conversion time is determined by the system clock, a faster clock results in a faster conversion time.
The A/D conversion clock must be selected to ensure a minimum Tad time of 1.6 µs. The formula for converting processor speed (in MHz) into Tad microseconds is as follows:
Tad = Tosc1
Where Tad is A/D conversion time, Tosc is the oscillator clock frequency in MHz, and Tdiv is the divisor determined by bits ADSC1 and ADSC0 of the ADCON0 register. For example, in a PIC running at 10MHz if we select the Tosc/8 option (divisor equal 8) the A/D conversion time per bit is calculated as follows:
In this case, the minimum recommended conversion speed of 1.6 µs is achieved.
However, in a PIC with an oscillator speed of 10MHz, this option produces a conversion speed of 0.8 µs, less than the recommended minimum. In this case we would have to select the divisor 32 option, giving a conversion speed of 3.2 µs.
Table 16.1
A/C Converter Tad at Various Oscillator Speeds
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TAD IN MICROSECONDS |
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OPERATION |
ADCS1:ADCS0 |
20MHZ |
10MHZ |
5MHZ |
1.25MHZ |
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Fosc/2 |
00 |
0.1 |
0.2 |
0.4 |
1.6 |
Fosc/8 |
01 |
0.4 |
0.8 |
1.6 |
6.4 |
Fosc/32 |
10 |
1.6 |
3.2 |
6.4 |
25.6 |
RC |
11 |
2-6 |
2-6 |
2-6 |
2-6 |
Note: values in bold are within the recommended limits
In Table 16.1, converter speeds of less than 1.6 µs or higher than 10 µs are not recommended. Recall that the Tad speed of the converter is calculated per bit, so the total conversion time in a 10-bit device (such as the 16F87x) is approximately the Tad speed multiplied by 10 bits, plus 3 additional cycles. Therefore, a device operating at a Tad speed of 1.6 µs requires 1.6 µs * 13, or 20.8 µs for the entire conversion.
Bits CHS2 to CHS0 in the ADCON0 register (see Figure 16-6) determine which of the analog channels is selected. This is required, since there are several channels for analog input but only one A/2 converter circuitry. So the setting of this bit field determines which of six or eight possible channels is currently read by the A/C converter. An application can change the setting of these bits in order to read several analog inputs in succession.
Bit 2 of the ADCON0 register, labeled GO/DONE, is both a control and a status bit. Setting the GO/DONE bit starts A/D conversion. Once conversion has started, the bit indicates if it is still in progress. Code can test the status of the GO/DONE bit in order to determine if conversion has concluded.
Bit 0 of the ADCON0 register turns the A/D module on and off. The initialization routine of an A/D-enabled application turns on this bit. Programs that do not use the A/D conversion module leave the bit off to conserve power.
The ADCON1 Register
The ADCON1 register also plays an important role in programming the A/D module. Bit 7 of the ADCON1 register is used to determine the bit justification of the digital re-
Analog to Digital and Realtime Clocks |
553 |
sult. This is possible because the 10-bit result is returned in two 8-bit registers; therefore, the six unused bits can be placed either on the leftor the right-hand side of the 16-bit result. If ADCON1 bit 7 is set then the result is right-justified; otherwise it is left-justified. Figure 16-7 shows the location of the significant bits.
Left-justified (ADFM bit = 0)
ADRESH ADRESL
0 |
0 |
0 |
0 |
0 |
0 |
V |
V |
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V |
V |
V |
V |
V |
V |
V |
V |
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Right-justified (ADFM bit = 1)
Legend:
V = valid digit
0 = digit always cleared
Figure 16-7 Leftand Right-justification of A/D Result
One common use of right justification is to reduce the number of significant bits in the conversion result. For example, an application on the 16F877 that uses the A/D conversion module requires only 8-bit accuracy in the result. In this case, code can left-justify the conversion result, read the ADRESH register, and ignore the low-order bits in the ADRESL register. By ignoring the two low-order bits, the 10-bit accuracy of the A/D hardware is reduced to eight bits and the converter performs as an 8-bit accuracy unit.
The bit field labeled PCFG3 to PCFG0 in the ADCON1 register determines port configuration as analog or digital and the mapping of the positive and negative voltage reference pins. The number of possible combinations is limited by the four bits allocated to this field, so the programmer and circuit designer must select the option that is most suited to the application when the ideal one is not available. Table 16.2 (in the following page) shows the port configuration options.
For example, there is a circuit that calls for two analog inputs, wired to ports RA0 and RA1, with no reference voltages. In Table 16.2 we can find two options that select ports RA0 and RA1 and are analog inputs: these are the ones selected with PCFG bits 0100 and 0101. The first option also selects port RA3 as analog input, even though not required in this case. The second one also selects port RA3 as a positive voltage reference, also not required.
Either option works in this case; however, any pin configured for analog input produces incorrect results if used as a digital source. Therefore, a channel configured for analog input cannot be used for non-analog purposes. On the other hand, a