Файл: Microcontroller Programming. Thi Micro Chip PIC (Julio Sanchez, 2007).pdf
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Analog to Digital and Realtime Clocks |
555 |
+5v |
|
RESET |
|
|
R=10K |
+5v
Pot 1 5K |
1 |
40 |
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!MCLR/VPP 16F877 |
RB7/PGD |
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2 |
39 |
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RA0/AN0 |
RG6/PGC |
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3 |
38 |
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RB5 |
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RA1/AN1 |
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4 |
37 |
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RB4 |
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RA2/AN2.VREF- |
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5 |
RB3/PGM |
36 |
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RA3/AN3/VREF+ |
LCD |
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6 |
35 |
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RB2 |
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RA4/TOCKI |
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7 |
34 |
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RB1 |
2 rows x 20 |
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RA5/AN4/SS |
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8 |
RB0/INT |
33 |
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RE0/!RD/AN5 |
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9 |
32 |
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RE1/!WR/AN6 |
VDD |
14 |
10 |
RE2/!CS/AN7 |
VSS |
31 |
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+5v |
11 |
30 |
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VDD |
RD7/PSP7 |
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12 |
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29 |
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VSS |
RD6/PSP6 |
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13 |
OSC1/CLKIN |
RD5/PSP5 |
28 |
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14 |
OS2/CLKOUT |
RD4/PSP4 |
27 |
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10 MHz |
15 |
26 |
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RC0/T1OSO/T1CKI |
RC7/RX/DT |
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Osc |
16 |
25 |
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RC1/T1OSI/CCP2 |
RC6/TX/CK |
RS |
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17 |
RC2/CCP1 |
RC5/SD0 |
24 |
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18 |
23 |
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RC3/SCK/SCL |
RC4/SDI/SDA |
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19 |
RD0/PSP0 |
RD3/PSP3 |
22 |
E |
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20 |
RD1/PSP1 |
RD2/PSP2 |
21 |
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R/W
+5 V
1
HD44780
Figure 16-8 Demonstration Circuit for A/D Conversion Module
Comparing Figure 16-8 with Figure 16-4, which uses the ADC0831 IC, we notice the economy of resources that results from selecting a PIC with an onboard A/D module. In the circuit of Figure 16-4 three microcontroller I/O ports must be used to connect the converter IC to the PIC. In the circuit of Figure 16-8, the potentiometer is connected directly to a single PIC port, saving two I/O lines. Considering the number of different PIC architectures that are equipped with onboard A/D converters, the circuit designer should explore this possibility before deciding on using a separate converter IC. At the same time, recall that two of the three input lines used by converter ICs can be shared. In a design with more than one converter IC the use of input lines is not a 3 to 1 ratio.
The circuit in Figure 16-8 consists of a 5K potentiometer wired to analog port RA0 of a 16F877 PIC. The LCD display is used to show three digits, in the range 0 to 255,
556 |
Chapter 16 |
that represent the relative position of the potentiometer’s disk. The program named A2DinLCD, in the book’s online software, uses the built-in A/D module.
Programming the A/D module consists of the following steps:
1.Configure the PIC I/O lines to be used in the conversion. All analog lines are initialized as input in the corresponding TRIS registers.
2.Select the ports to be used in the conversion by setting the PCFGx bits in the ADCON1 register. Selects rightor left-justification.
3.Select the analog channels, select the A/D conversion clock, and enable the A/D module.
4.Wait the acquisition time.
5.Initiate the conversion by setting the GO/DONE bit in the ADCON0 register.
6.Wait for the conversion to complete.
7.Read and store the digital result.
The following procedure from the A2DinLCD program initialized the A/D module for the required processing:
;============================
;init A/D module ;============================
;1. Procedure to initialize the A/D module, as follows:
;Configure the PIC I/O lines. Init analog lines as input
;2. Select ports to be used by setting the PCFGx bits in the
;ADCON1 register. Selects rightor left-justification.
;3. Select the analog channels, select the A/D conversion
;clock, and enable the A/D module.
;4. Wait the acquisition time.
;5. Initiate the conversion by setting the GO/DONE bit in the
;ADCON0 register.
;6. Wait for the conversion to complete.
;7. Read and store the digital result.
InitA2D:
Bank1 |
; |
Select bank |
for TRISA register |
|
movlw |
b’00000001’ |
|||
movwf |
TRISA |
; |
Set Port-A, |
line 0, as input |
;Select the format and A/D port configuration bits in
;the ADCON1 register
;Format is left-justified so that ADRESH bits are the
;most significant
; |
0 |
x |
x |
x |
1 |
1 |
1 |
0 |
<== value installed in ADCON1 |
||
; |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
<== ADCON1 |
bits |
|
; |
| |
|__|__|__|____ RA0 is analog. |
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; |
| |
Vref+ |
= |
Vdd |
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; |
| |
Vref- |
= |
Vss |
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;|_________________________ 0 = left-justified
;ADCON1 is in bank 1
Analog to Digital and Realtime Clocks |
557 |
|
movlw |
b’00001110’ |
|
movwf |
ADCON1 ; RA0 is analog. All others digital |
|
;Vref+ = Vdd
;Select D/A options in ADCON0 register
;For a 10Mhz clock the Fosc32 option produces a conversion
;speed of 1/(10/32) = 3.2 microseconds, which is within the
;recommended range of 1.6 to 10 microseconds.
; |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
<== value installed in ADCON0 |
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; |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
<== ADCON0 bits |
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; |
| |
| |
| |
| |
| |
| |
|____ |
A/D |
function |
select |
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; |
| |
| |
| |
| |
| |
| |
1 = |
A/D ON |
|||||
; |
| |
| |
| |
| |
| |
|__________ |
A/D |
status bit |
|||||
; |
| |
| |
|__|__|_____________ |
Analog Channel |
Select |
||||||||
; |
| |
| |
000 |
= Chanel |
0 |
(RA0) |
|||||||
;|__|______________________ A/D Clock Select
; |
10 = Fosc/32 |
|
; ADCON0 is in bank 0 |
||
Bank0 |
||
movlw |
b’10000001’ |
|
movwf |
ADCON0 |
; Channel 0, Fosc/32, A/D enabled |
; Delay for selection to complete |
||
call |
delayAD |
; Local procedure |
return |
||
Once the module is initialized, the analog line is read by the following procedure:
;============================
;read A/D line ;============================
;Procedure to read the value in the A/D line and convert
;to digital
ReadA2D: |
||
; Initiate conversion |
||
Bank0 |
; Bank for ADCON0 register |
|
bsf |
ADCON0,GO |
; Set the GO/DONE bit |
; GO/DONE bit is cleared automatically when conversion ends convWait:
btfsc goto
;At this point conversion has concluded
;ADRESH register (bank 0) holds 8 MSBs of result
;ADRESL register (bank 1) holds 4 LSBs.
;In this application value is left-justified. Only the
;MSBs are read
movf |
ADRESH,W ; Digital value to w register |
return