Файл: Microcontroller Programming. Thi Micro Chip PIC (Julio Sanchez, 2007).pdf

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622

Appendix C

Table C.1

Mid-range PIC Instruction Set (continued)

BITS

MNEMONIC

OPERAND

DESCRIPTION

CYCLES

AFFECTED

LITERAL AND CONTROL OPERATIONS

ANDLW

k

AND literal and w

1

Z

CALL

k

Call procedure

2

-

CLRWDT

-

Clear watchdog timer

1

TO,PD

GOTO

k

Go to address

2

-

IORLW

k

Inclusive OR literal with w

1

Z

MOVLW

k

Move literal to w

1

-

RETFIE

-

Return from interrupt

2

-

RETLWk

-

Return literal in w

2

-

RETURN

-

Return from procedure

2

-

SLEEP

-

Go into SLEEP mode

1

TO,PD

SUBLW

k

Subtract literal and w

1

C,DC,Z

XORLW

k

Exclusive OR literal

1

Z

with w

Legend:

f = file register

d = destination:

0 = w register

b = bit position

1 = file register

k = 8-bit constant

Mid-range Instruction Set

623

Table C.2

Conventions used in Instruction Descriptions

FIELD

DESCRIPTION

f

Register file address (0x00 to 0x7F)

w

Working register (accumulator)

b

Bit address within an 8-bit file register (0 to 7)

kLiteral field, constant data or label (may be either an 8-bit or an 11-bit value)

x

Don't care (0 or 1)

d

Destination select;

d = 0: store result in W,

d = 1: store result in file register f.

dest

Destination either the W register or the specified register file

location

label

Label name

TOS

Top of Stack

PC

Program Counter

PCLATH

Program Counter High Latch

GIE

Global Interrupt Enable bit

WDT

Watchdog Timer

!TO

Time-out bit

!PD

Power-down bit

[ ]

Optional element

[XXX]Contents of memory location pointed at by XXX register

( )

Contents

->

Assigned to

< >

Register bit field

italics User defined term

624 Appendix C

ADDLW

Add Literal and w

Syntax:

[label] ADDLW

k

Operands:

k in range 0 to 255

Operation:

(w) + k -> w

Status Affected:

C, DC, Z

Description:

The contents of the w register are added to

the eight bit literal 'k' and the result is

placed in the w register

Words:

1

Cycles:

1

Example1:

ADDLW

0x15

Before Instruction:

w = 0x10

After Instruction:

w = 0x25

Example 2:

ADDLW

var1

Before Instruction:

w = 0x10

var1 is data memory variable

var1 = 0x37

After Instruction

w = 0x47

Mid-range Instruction Set

625

ADDWF

Add w and f

Syntax:

[ label ] ADDWF f,d

Operands:

f in range 0 to 127

d = 0 / 1

Operation:

(W) + (f) -> destination

Status Affected:

C, DC, Z

Description:

Add the contents of the W register with

register 'f'. If 'd' is 0 the result is stored in

the w register. If 'd' is 1 the result is stored

back in register 'f'.

Words:

1

Cycles:

1

Example 1:

ADDWF FSR,0

Before Instruction:

w = 0x17

FSR = 0xc2

After Instruction

W = 0xd9

FSR = 0xc2

Example 2:

ADDWF INDF, 1 before Instruction:

W = 0x17

FSR = 0xC2

Contents of Address (FSR) = 0x20

After Instruction

W = 0x17

FSR = 0xC2

Contents of Address (FSR) = 0x37

626 Appendix C

BCF

Bit Clear f

Syntax:

[ label ] BCF f,b

Operands:

f in range 0 to 127

b in range 0 to 7

Operation:

0 ->f<b>

Status Affected:

None

Description:

Bit 'b' in register 'f' is cleared.

Words:

1

Cycles:

1

Example 1:

BCF

reg1,7

Before Instruction: reg1 = 0xc7 (1100 0111)

After Instruction: reg1 = 0x47 (0100 0111)

Example 2:

BCF

INDF,3

Before Instruction:

w = 0x17

FSR = 0xc2

[FSR]= 0x2f

After Instruction

w = 0x17

FSR = 0xc2

[FSR] = 0x27

Mid-range Instruction Set

627

BSF

Bit Set f

Syntax:

[ label ] BSF f,b

Operands:

f in range 0 to 127

b in range 0 to 7

Operation:

1-> f<b>

Status Affected:

None

Description:

Bit 'b' in register 'f' is set.

Words:

1

Cycles:

1

Example 1:

BSF

reg1,6

Before Instruction :

reg1 = 0011

1010

After Instruction:

reg1 = 0111

1010

Example 2:

BSF

INDF,3

Before Instruction:

w = 0x17

FSR = 0xc2

[FSR] = 0x20

After Instruction

w = 0x17 FSR = 0xc2

[FSR] = 0x28

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