Файл: Microcontroller Programming. Thi Micro Chip PIC (Julio Sanchez, 2007).pdf

The TTL logic gates require a 5-volt DC power supply regulated to within 5% (5V ± 0.25V). They are available in a variety of packages. For prototyping and manually built applications the most-used package is the dual inline package (DIP). DIP integrated circuits have 14, 16, 20, 24, 28, or 40 pins arranged in a row along two sides of a rectangular plastic package containing the silicon chip. The ground pin is usually the last in the first row. For example, pin 7 of a 14-pin DIP. The 5-volt power pin is usually the highest numbered pin. For example, pin 14 on the 14-pin DIP. The pins in a DIP package are spaced 0.1" apart. DIP components are mounted on a printed circuit board by inserting the pins through a set of holes and then soldering the pins in place. Figure 5-11 shows two integrated circuits in a DIP package.

pin 1

Figure 5-11 Dual Inline Packaged (DIP) Integrated Circuits

One objection to DIP packages is that they become too large if more than 40 pins are required. The pin grid array (PGA) is one solution to this problem. PGAs are square packages with an array of pins coming out of the bottom. Microprocessors are sometimes implemented in PGAs. Surface mount technologies are often used in commercial electronic boards, since they allow fitting more circuitry into a smaller space. The pins on surface mount packages are bent out horizontally and soldered to the top surface of the board. In surface mount ICs the pin spacing is .05 inch or less. But surface mount packages are difficult to handle outside of commercial production, since the smaller pins spacing require special soldering irons and inspection microscopes. For non-manufactured projects, such as the ones in this book, the

DIP is the most suitable.

In the present context we discuss TTL logic gates furnished as integrated circuits constructed using semiconductor electronics. The part number of logic gate ICs is in the format 74XXX, where XXX refers to the specific gate implementation.

5.4.1 Inverter Gates

IC number 7404 is a hex inverter. Here the term hex refers to the six inverters included in the circuit. Figure 5-12 shows the schematics of the 7404 hex inverter.

Figure 5-12 7404 TTL Hex Inverter IC

The function of a given logic gate can be shown in a truth table, such as the one in Figure 5-12. The truth table lists the outputs (high or low) for the given inputs (also high or low).

5.4.2 The AND Gate

The 7408 is an AND gate that includes four individual gates per package. The 7408 AND gate and its truth table are shown in Figure 5-13.

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Figure 5-13 7408 Quad 2-input AND Gate

The AND gate in Figure 5-13 is described as quad 2-input. Four individual AND gates are contained in the circuit and each one has two input lines. The gate logic corresponds to the Boolean AND: if both inputs are high, then the output is high, otherwise the output is low. If the input lines are designated as A and B, and the output as Y, then the AND operation can be expressed in the equation:

Y = A• B

In this case the dot operator represents the AND function, not arithmetic multiplication.

5.4.3 The NAND Gate

A variation of the AND gate is the 7400 NAND gate. In this case the AND operation is replaced with the inverted AND, or NAND. Thus, if both inputs are high, the output is low, otherwise the output is high. The 7400 NAND gate is shown in Figure 5-14.

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Figure 5-14 7400 Quad 2-input NAND Gate

Note that in the NAND gate of Figure 5-14, the AND symbol has been replaced with the NAND symbol as in Figure 5-10. The logic equation for the NAND gate is the combination of the AND and NOT operations, as follows:

Y = A• B

Here the vertical bar over the equation’s right-hand side indicates negation.

5.4.4 The OR Gate

The 7432 OR gate performs the Boolean OR of the two input lines. If either line A or line B is high, then line Y is high, otherwise line Y is low. Figure 5-15 is a diagram of the 7432 quad 2-input OR gate.

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Figure 5-15 7432 Quad 2-Input OR Gate

The equation of the OR operation with two inputs is:

Y = A + B

The plus sign in the previous equation indicates the Boolean OR operation, not arithmetic addition.

5.4.5 The NOR Gate

Another version of the OR gate is the 7402 NOR quad 2-input NOR gate. Here the Boolean OR is negated, as shown in Figure 5-16.

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Figure 5-16 7402 Quad 2-input NOR gate

circuit truth table. But the NAND gate can also be interpreted as a negative logic OR gate as in Figure 5-17. The one logic operation that is the same in negative or positive logic is NOT, as also shown in Figure 5-17.

An alternative explanation of positive and negative logic can be based on the truth table for the Boolean OR, as follows:

In binary form and positive logic the OR truth table is as follows:

If we now invert the binary values in the second table, the results are as follows:

Note that the last truth table matches that of the AND function. Thus, by inverting the truth table for the logical OR we produced the truth table for logical AND, validating the previous assertion that a negative logic AND gate is equivalent to an OR gate.

5.4.7 The XOR Gate

The last elementary logic gate is called the XOR or exclusive OR gate. In the XOR function the output is high if the inputs have opposite values, otherwise the output is low. Figure 5-18 shows the 7486 quad 2-input XOR gate and the corresponding truth table.

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Figure 5-18 7486 Quad 2-input XOR gate