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Communications

353

R=470 Ohm

RECEIVE

READY

LED

RESET

+5V

R=10K

RECEIVE

READY

SERIAL

IN

+5V

R=10K

1

16F84

18

Osc

RA2

RA1

2

RA3

RA0

17

3

16

4

RA4/TOCKI

OSC1

MCLR

OSC2

15

5

14

+5V

Vss

Vdd

6

13

RB0/INT

RB7

7

12

8

RB1

RB6

11

RB2

RB5

9

10

RB3

RB4

R=470Xx8 Ohm

R=470 Ohm

SEND

READY

LED

RESET

+5V

R=10K

SEND

SERIAL

OUT

+5V

R=10K

1

16F84

18

Osc

RA2

RA1

2

17

RA3

RA0

3

16

RA4/TOCKI

OSC1

4

15

MCLR

OSC2

5

14

+5V

Vss

Vdd

6

13

RB0/INT

RB7

7

12

RB1

RB6

8

11

RB2

RB5

9

10

10K R

RB3

RB4

X 8

DIP SW

(DATA)

Figure 14-7 PIC-to-PIC Serial Communications Circuits


354

Chapter 14

PIC-to-PIC Serial Communications Programs

The software consists of two different programs, one to run in the sender PIC and one in the receiver PIC. Asynchronous communications require that sender and receiver operate at the same data speed. Both devices need not run at the same clock speed, but both must synchronize data transmission and reception at the same clock rate. Since the easiest way to accomplish this is to have both PICs use the same oscillator at the same speed, we make this assumption in the programs that follow.

The instruction time and clock rate of a PIC are one-fourth of its clock speed. Thus, a PIC with a 4Mhz clock runs at 1,000,000 cycles per second, and the default timer speed is:

1,000,000 = μ 3,906.25 s. per bit

256

approximately 3,906µs per clock cycle. Although 3,906µs is not a standard baud rate, the present application is self-contained, therefore there is no need to conform to

RS232-C or any other protocol.

Since it seems more intuitive to associate a high voltage with a logic 1 and a low voltage with a logic 0, we will adopt this convention in the present application. Nevertheless, we will borrow the character structure from the RS-232-C convention, that is, information will contain a start bit, a series of eight data bits, and a stop bit.

No parity is implemented. Figure 14-8 shows the bit structure for one character in our application.

START BIT

DATA BITS (10010001 = 0x91)

STOP BIT

0

1

0

0

1

0

0

1

0

1

LOGIC ONE STATE

Signal

Edge of

start bit

Protocol (in this example): 1 start bit

8 data bits (character) no parity bit

1 stop bit

Figure 14-8 Data Structure for PIC-to-PIC Application


Communications

355

The sender program, named SerialSnd, performs the following initialization operations:

1.Line RA2 is initialized for input since the pushbutton switch is located on this line. Lines RB0 to RB7 are also input, since they are connected to the DIP switch array.

2.The prescaler is assigned to the Watchdog Timer so that channel TMR0 runs at full processor speed.

3.Interrupts are disabled.

Initialization code is as follows:

; Port-A, bit 2 is input. All others are output

movlw

b’00000100’

; Port-A bit 2 is input

; all others are output

tris

porta

; Port-B is all input

movlw

b’11111111’

tris

portb

bsf

porta,1

;Marking bit

;Prepare to set prescaler clrf tmr0 clrwdt

;Setup OPTION register for full timer speed

movlw

b’11011000’

;

1

1

0

1

1

0 0 0 <= OPTION bits

;

|

|

|

|

|

|__|__|_____

PS2-PS0 (prescaler bits)

;

|

|

|

|

|

Values for Timer0

;

|

|

|

|

|

*000

= 1:2

001 =

1:4

;

|

|

|

|

|

010

= 1:8

011 =

1:16

;

|

|

|

|

|

100

= 1:32

101 =

1:64

;

|

|

|

|

|

110

= 1:128 111 =

1:256

;

|

|

|

|

|______________

PSA

(prescaler assign)

;

|

|

|

|

*1

=

to WDT

;

|

|

|

|

0

=

to Timer0

;

|

|

|

|_________________

TOSE (Timer0 edge

select)

;

|

|

|

0

=

increment on low-to-high

;

|

|

|

*1

=

increment in high-to-low

;

|

|

|____________________

TOCS (TMR0 clock source)

;

|

|

*0

=

internal clock

;

|

|

1

=

RA4/TOCKI bit

source

;

|

|_______________________

INTEDG (Edge select)

;

|

0

=

falling edge

;

|

*1

=

raising edge

;|__________________________ RBPU pullups

;

0

=

enabled

;

*1

=

disabled

option

; Disable interrupts

bcf

intcon,5

; Timer0 overflow disabled


356

Chapter 14

bcf

intcon,7

; Global interupts disabled

Once initialized, the program performs the following functions:

1.The SEND READY LED is turned on.

2.Code monitors the SEND pushbutton switch.

3.Once the switch is pressed, the program turns off the SEND READY LED.

4.The state of the DIP switches is obtained by reading RB0 to RB7.

5.The byte from Port-B is sent through the serial line.

The following code fragment shows the procedure to send serial data.

;============================================================

;

procedure to send serial data

;============================================================

;ON ENTRY:

;local variable dataReg holds 8-bit value to be

;transmitted through port labeled serialLN

;OPERATION:

;1. The timer at register TMR0 is set to run at

;maximum clock speed, that is, 256 clock beats.

;The timer overflow flag in the INTCON register

;is set when the timer cycles from 0xff to 0x00.

;2. Each bit (start, data, and stop bits) is sent

;at a rate of 256 timer beats. That is, each bit is

;held high or low for one full timer cycle (256

;clock beats).

;3. The procedure tests the timer overflow flag

;(tmrOVF) to determine when the timer cycle has

;ended, that is when 256 clock beats have passed.

;

sendData:

movlw

0x08

; Setup shift counter

movwf bitCount

;=======================

;send START bit ;=======================

;Set line low then hold for 256 timer clock beats.

bcf

PORTA,serialLN

; Send start bit

; First reset timer

clrf

TMR0

; Reset timer counter

bcf

INTCON,tmrOVF

; Reset TMR0 overflow flag

; Wait for 256 timer clock beats

startBit:

btfss

INTCON,tmrOVF

; timer overflow?

goto

startBit

; Wait until set

; At this point timer has cycled. Start bit has ended

bcf

INTCON,tmrOVF

; Clear overflow flag


Communications

357

;========================

;send 8 DATA bits ;========================

;Eight data bits are sent through the serial line

;starting with the high-order bit. The data byte is

;stored in the register named dataReg. The bits are

;rotated left to the carry flag. Code assumes the bit

;is zero and sets the serial line low. Then the carry

;flag is tested. If the carry is set the serial line

;is changed to high. The line is kept low or high for

;256 timer beats.

send8:

rlf

dataReg,f

; Bit into carry flag

bcf

PORTA,serialLN

; 0 to serial line

;Code can assume the bit is a zero and set the line

;low since, if low is the wrong state, it will only

;remain for two timer beats. The receiver will not

;check the line for data until 128 timer beats have

;elapsed, so the error will be harmless. In any case,

;there is no assurance that the previous line state is

;the correct one, so leaving the line in its previous

;state could also be wrong.

btfsc

STATUS,c

; Test carry flag

bsf

PORTA,serialLN

; Bit

is set. Fix error.

bitWait:

btfss

INTCON,tmrOVF

;

Timer cycled?

goto

bitWait

;

Not

yet

;At this point timer has cycled.

;Test for end of byte, if not, send next bit

bcf

INTCON,tmrOVF

; Clear overflow flag

decfsz

bitCount,f

;

Last bit?

goto

send8

;

not yet

;=========================

;hold MARKING state ;=========================

;All 8 data bits have been sent. The serial line must

;now be held high (MARKING) for one clock cycle

bsf

PORTA,serialLN

; Marking state

markWait:

btfss

INTCON,tmrOVF

;

Done?

goto

markWait

;

not yet

;=========================

; end of transmission

;=========================

return