Файл: Embedded Controller Hardware Design (Ken Arnold, 2001).pdf

12EMBEDDED CONTROLLER

Hardware Design

Transistor Switch OFF

When the input is connected to logic zero (ground voltage), no current flows into the base of the transistor, since its base and emitter terminals are at the same voltage. When there is no current flowing in the base, the transistor will not allow current to flow in the collector emitter circuit either. As a result, the circuit behaves as if the transistor was removed from the circuit. The output resistor will source current to any potential load. The output is pulled up to the supply voltage, resulting in a logic one at the output. Once again, there is a limit to the resistor’s ability to source current, resulting in a limit to the number of loads that can be attached to this circuit’s output. Notice these two limits are defined by the ability of the transistor to pull down the output, and the resistor’s ability to pull up the output become the main limits to its ability to drive other devices. Gates can be constructed by adding diodes or transis­ tors to the inverter circuit in Figure 1-11.

Figure 1-11: The transistor inverter; input = 0 and transistor OFF.

The transistor OFF configuration is at left and the equivalent circuit is at right.

The FET as a Logic Switch

Most of the logic devices used in highly integrated circuits do not use bipolar tran­ sistors. Instead, they use field effect transistors. FETs perform a similar function

from the source-drain circuit, as shown in Figure 1-12.

14EMBEDDED CONTROLLER

Hardware Design

CMOS Logic

CMOS logic (complementary symmetry MOS) is another form of MOS logic. It has advantages over NMOS logic for low power circuitry and for very complex integrated circuits. NMOS logic is relatively simple, but it has one serious draw­ back: it consumes a significant amount of power. In fact, it would be impossible to manufacture the largest ICs using NMOS logic, as the power dissipated by the chip would cause it to overheat. This is the main reason CMOS logic has become the dominant form of logic used for large, complex ICs. Instead of using a resistor to source current when the output is high, a CMOS device uses a P-channel MOSFET to pull the output high. CMOS logic is based on the use of two complementary FETs that switch the output between the power supply and ground. A simple CMOS inverter is shown in Figure 1-15.

Figure 1-15: CMOS inverter circuit and equivalent output.

CMOS logic uses two switches: one P-channel pull-up transistor, and one N-channel pull-down device to pull the output low or high, one at a time. CMOS logic is designed with an N-channel device that turns on and conducts when the gate voltage is at logic one (positive voltage), and the P-channel device turns on when the gate is at ground voltage. A CMOS inverter is com­ prised of a pair of FETs, one device of each type, as shown in Figure 1-15.

When the transistor gate inputs are at logic one (positive voltage), the P-channel device is off, and the N-channel device is on, effectively connecting the output to ground, or logic zero. Likewise, when the input is grounded, the P-channel device turns on and the N-channel device turns off, effectively connecting the output to the positive supply voltage, or logic one. Gates and more complex logic functions can be constructed by using series and parallelconnected MOSFETs in circuits similar to the one above. The gate of a

15CHAPTER ONE

Review of Electronics Fundamentals

MOSFET, as implied by the symbol, is essentially an open circuit. In fact, the gate of a MOSFET does have an extremely high resistance. The operation of the MOSFET’s channel is controlled by the voltage of the gate, unlike the bipolar NPN transistor we examined in the inverter, which is controlled by input (base) current. Bipolar transistors are current amplifiers, with their output current being controlled by their base current. FET outputs, on the other hand, are dependent on the gate voltage.

Since almost no current flows in a CMOS output when it is driving a CMOS gate input in the steady state condition, these logic devices consume much less power than the other types. MOS logic has some other advantages over bipolar logic, since there is almost no input current (less than one nanoampere, or 10-9 ampere), so it does not need to exact a DC current load on the device driving it. This is good news, because it means that the input current of a CMOS device does not limit the number of gates that can be connected to the output of the driving gate. The number of gate inputs that a single gate output can drive is the gate fan-out. Fan-out applies between gates of the same logic family, as different families of logic have different output capabilities and their inputs present different loads.

Now for the bad news about the high input resistance of MOS devices: the insulation separating the input from the channel is very thin (measured in angstroms). This thin layer can easily be punctured by electrostatic discharge (ESD), such as occurs regularly when dissimilar materials rub against one another. Just walking across the room can generate tens of kilovolts, which is more than enough to destroy a MOS device. As a result, special precautions must be taken to prevent damage to MOS devices. When handling these devices, it is important to ground your body before touching the device, and to also keep the device at or near ground. Special wrist straps and workspace mats are available to assist in keeping static voltages from building up and for dissipating them when they do occur. Special, conductive bags and containers should be used when possible to contain sensitive devices.

CMOS power consumption is usually dominated by the power consumed dur­ ing the transition of a logic device from one state to another. As a result, pure CMOS devices consume only a few microamperes of current when they are not switching, and the bulk of the current drawn is a function of clock frequency. The higher the clock frequency, the greater the current consumption. For pure CMOS, the power supply current is linearly proportional to the clock rate.

16EMBEDDED CONTROLLER

Hardware Design

Mixed MOS

Many logic devices labeled as CMOS are actually a mixture of NMOS and CMOS, because the manufacturer needs to compromise the extremely low power of CMOS with the performance of NMOS logic. This can be a problem for design­ ers of battery-powered systems, since the current requirement (and the resulting battery life) of a pure CMOS circuit is orders of magnitude better than an NMOS circuit. Many CMOS memories are actually mixed MOS, and are not appropri­ ate for battery-powered systems. True CMOS chips can retain their contents for years using only a single coin cell to maintain power to the memory.

Real Transistors Don’t Eat Q!

So far we have described the various types of transistors as perfect switches that have zero resistance when they’re on and infinite resistance when they’re off. When we examine the actual behavior, we find that real transistors do not exhibit these characteristics. A transistor switch may have tens or hundreds of ohms of resistance when it is

on, and hundreds or even tens of thousands of ohms of “leakage”

resistance when it’s off. As a result, the logic outputs aren’t perfect either. When the transistor is on, the output voltage is a function of the output

current, due to the voltage

drop across the resistance. As Figure 1-16 shows, the output voltage of a logic device will

depend upon how much cur­ rent is flowing in the output and the resistance of the switch.

Unfortunately, the switch resistance is also non-linear so that the switch resis­ tance changes as the voltage across the switch changes. This makes it difficult to picture the output behavior under different operating conditions. The behavior will also differ from one device to another, over temperature, and so on. Manufacturers only specify the output characteristic at one point on the