Файл: Embedded Controller Hardware Design (Ken Arnold, 2001).pdf

21CHAPTER ONE

Review of Electronics Fundamentals

Timing diagrams are a critical method to allow accurate and unambiguous representation of the time related operations of digital circuits, which we will be using to understand and document the correct sequence of operations for microcomputer systems. Timing analysis, using these diagrams, allows the designer to determine safe and reliable limits to proper operation of the various circuits in the system. It is better to take a little more time to design a circuit correctly from the start than it is to find and fix bugs during testing. This is especially true because of the increasing cost of fixing a bug as a product progresses through production and into the field.

Loading and Noise Margin Analysis

In addition to timing, the designer must consider the voltages and loads at the logic inputs and outputs. If the output of one gate is connected to the input of another, the designer must assure that the logic voltages are compatible. Once again, just as for the timing, violations of these specifications often result in infrequent errors that are very tricky to reproduce. Again, prevention is much simpler than tracking down bugs as they appear in production units. This topic is the subject of Chapter Three.

The Design and Development Process

Structured design of a microcomputer requires the ability to do the system design and partitioning from the top down while implementing the system from the bottom up. The hardware design and development process should consist of the following steps:

1)Defining the requirements.

2)Collecting information on potential components.

3)Evaluate the components with respect to the requirements.

4)Do a block diagram preliminary design and component selection.

5)Perform a preliminary timing and loading analysis.

6)Define the functions of the “glue logic.”

7)Schematic entry using CAD (computer-aided design) software.

8)Programmable logic device design and simulation.

22EMBEDDED CONTROLLER

Hardware Design

9)Detailed timing analysis and simulation, adjusting the design as required.

10)Check the signal loading, buffering signals as needed.

11)Document the design and generate a net list and bill of materials.

12)Begin the design and layout of a printed circuit board.

13)Implement the design in breadboard or prototype form.

14)Program the memories and programmable logic as required for testing.

15)Debug and verify operation using oscilloscope, logic analyzer, and in-circuit emulator.

16)Update and complete documentation as the design changes.

The order of tasks shown is variable, and some of the tasks may be performed in parallel. Software design is also frequently done in parallel with hardware design, and sometimes even before the hardware design. This is frequently a result of the fact that the cost and time required to develop the software exceeds that of the hardware development. In some cases the cost of modifying existing programs may be so high as to be impractical. In these cases, it is the designer’s responsibility to maintain software compatibility with previous hardware designs.

Chapter One Problems

1.If an open-drain N-channel FET transistor is used as a logic output, is it possible to connect more than one open-drain transistor output to the same signal? What would the effect of doing so be on the resulting combined signal?

2.If a logic output sinks IOL = 10 milliamperes with an output voltage, VOL = 0.5 volts, how much power is dissipated by a 450 ohm resistor between the output and the 5 volt power supply?

3.How much current must a logic output source, in order to maintain an output voltage of 2.5 volt when driving a 5 kilohm resistor connected to ground?

4.In a CMOS inverter, there is a short period of time when both the N- and P-channel transistors are partially turned on when the input is changing from low to high or high to low. What effect will this have on power con­ sumption? What characteristic in the input signal would reduce this effect?

Microcontroller Concepts

One way of looking at a computer system is to consider the successive “translations” that occur from the high level code (a programming language such as C++) to the electrical signals that “communicate” with the hardware. A computer system can be broken down into multiple levels or layers to show the translation of a specific instruction into a form that can be directly pro­ cessed by the computer hardware. Such hierarchical levels are discussed in detail in Structured Computer Organization by A.S. Tanenbaum. This hierarchy is shown in Figure 2-1

Figure 2-1: “Layers” of a computer system.

Language translators such as compilers and assemblers translate highlevel code into machine code that can be executed by the processor. The primary focus of this book will be from the assembly and machine language level downward.

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Hardware Design

Organization: von Neumann vs. Harvard

We introduced the von Neumann and Harvard computer architectures in Chapter One. The von Neumann machine, with only one memory, requires all instruction and data transfers to occur on the same interface. This is sometimes referred to as the “von Neumann bottleneck.” In common computer architec­ tures, this is the primary upper limit to processor throughput. The Harvard architecture has the potential advantage of a separate interface allowing twice the memory transfer rate by allowing instruction fetches to occur in parallel with data transfers. Unfortunately, in most Harvard architecture machines, the memory is connected to the CPU using a bus that limits the parallelism to a single bus. The memory separation is still used to advantage in microcontrollers, as the program is usually stored in non-volatile memory (program is not lost when power is removed), and the temporary data storage is in volatile memory. Non-volatile memories, such as read-only memory (ROM) are used in both types of systems to store permanent programs. In a desktop PC, ROMs are used to store just the start-up or bootstrap programs and hardware specific programs. Volatile random access memory (RAM) can be read and written easily, but it loses its contents when power is removed. RAM is used to store both application programs and data in PCs that need to be able to run many different programs.

In a dedicated embedded computer, however, the programs are stored permanently in ROM where they will always be available. Microcontroller chips that are used in dedicated applications generally use ROM for program storage and RAM for data storage. Memory technology is crucial to the design and understanding of embedded computers, and Chapter Four is dedicated to this important topic.

Microprocessor/Microcontroller Basics

There are three groups of signals, or buses, that connect the CPU to the other major components. The buses are:

•Data bus

•Address bus

•Control bus

The data bus width is defined as the number of bits that can be transferred on the bus at one time. This defines the processor’s “word size.” Many chip vendors define the word size based on the width of an internal data bus. For the purposes

25CHAPTER TWO

Microcontroller Concepts

of this book, however, a processor with eight data bus pins is an 8-bit CPU. Both instructions and data are transferred on the data bus one “word” at a time. This allows the re-use of the same connections for many different types of information. Due to packaging limitations, the number of connections or pins on a chip is limited. By sharing the pins in this way, the number of pins required is reduced at the expense of increased complexity in the external circuits. Many processors also take this a step further and share some or all of the data bus pins to carry address information as well. This is referred to as a multiplexed address/data bus. Processors that have multiplexed address/data buses require an external address latch to separate and hold the address information stable for the duration of a data transfer. The processor controls the direction of data transfer on the data bus.

The address bus is a set of wires that are used to point to the memory or I/O location that is to be read from or written to. The address signals must gener­ ally be held at a constant value for some period of time before, during, and after the data is transferred. In most cases, the processor actively drives the address bus with either instruction or data addresses.

The control bus is an assortment of signals that determine what kind of informa­ tion is on the data bus and determines where the data will go, in conjunction with the address bus. Most of the design process is concerned with the logic and timing of the control signals. The timing analysis is primarily involved with the relative timing between these control signals and the appearance and disappearance of data and addresses on their respective buses.

Microcontroller CPU, Memory, and I/O

The interconnection between the CPU, memory, and I/O of the address and data buses is generally a one-to-one connection. The hard part is designing the appropriate circuitry to adapt the control signals present on each device to be compatible with that of the other devices. The most basic control signals are generated by the CPU to control the data transfers between the CPU and memory, and between the CPU and I/O devices. The four most common types of CPU controlled data transfers are: