Файл: Microcontroller Programming. Thi Micro Chip PIC (Julio Sanchez, 2007).pdf
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464 |
Chapter 15 |
;same manner to determine the decimal tenths result.
;The final remainder is the decimal units result.
;Variables:
; |
inNum |
storage for source operand |
;asc100 storage for hundreds position result
; |
asc10 |
storage for tenth position result |
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; |
asc1 |
storage for unit position result |
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; |
thisDig |
Digit counter |
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bin2asc: |
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movwf |
inNum |
; Save copy of source value |
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clrf |
asc100 |
; Clear hundreds storage |
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clrf |
asc10 |
; Tens |
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clrf |
asc1 |
; Units |
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clrf |
thisDig |
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sub100: |
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movlw |
.100 |
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subwf |
inNum,f |
; Subtract 100 |
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btfsc |
STATUS,C |
; Did subtract overflow? |
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goto |
bump100 |
; No. Count subtraction |
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goto |
end100 |
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bump100: |
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incf |
thisDig,f |
;increment digit counter |
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goto |
sub100 |
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; Store 100th digit |
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end100: |
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movf |
thisDig,w |
; Adjusted digit counter |
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addlw |
0x30 |
; Convert to ASCII |
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movwf |
asc100 |
; Store it |
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; Calculate tenth position value |
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clrf |
thisDig |
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; Adjust minuend |
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movlw |
.100 |
; Minuend |
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addwf |
inNum,f |
; Add value to minuend to |
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; compensate for last |
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; operation |
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sub10: |
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movlw |
.10 |
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subwf |
inNum,f |
; Subtract 10 |
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btfsc |
STATUS,C |
; Did subtract overflow? |
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goto |
bump10 |
; No. Count subtraction |
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goto |
end10 |
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bump10: |
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incf |
thisDig,f |
; Increment digit counter |
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goto |
sub10 |
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; Store 10th digit |
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end10: |
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movlw |
.10 |
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addwf |
inNum,f |
; Adjust for last subtraction |
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Data EEPROM Programming |
465 |
|
movf |
thisDig,w |
; Digit counter contents |
addlw |
0x30 |
; Convert to ASCII |
movwf |
asc10 |
; Store it |
; Calculate and store units digit |
||
movf |
inNum,w |
; Store units value |
addlw |
0x30 |
; Convert to ASCII |
movwf |
asc1 |
; Store digit |
Return |
||
15.0.2 EEPROM Programming on the 16F87x
The 16F87x PICs contain 128 or 256 bytes of EEPROM data memory. As in the 16F84, this memory is both readable and writable during normal operation. It is not mapped in the register file space but is indirectly addressed through Special Function Registers, as described later in this section.
In the 16F87x PICs both data EEPROM and flash Program Memory are readable and writable during normal operation. For data EEPROM memory, read and write operations take place one byte at a time. The write operation performs an erase-then-write cycle. No bulk erase function is available to user code.
The following Special Function Registers are used in 16F87x EEPROM data read and write operations:
1.EEDATA holds the data byte to be read or written.
2.EEADR contains the EEPROM address to be accessed by the read or write operation.
3.EECON1 contains the control bits for EEPROM operations.
4.EECON2 protects EEPROM memory from accidental access. This is not a physical register.
EEPROM data memory read and write operations do not interfere with normal PIC operations. The 16F873 and 16F874 PICs have 128 bytes of EEPROM data memory. These ICs require that the most-significant-bit of EEADR remains clear. The EEPROM data memory on these devices does not wrap around; that is, accessing EEPROM address 0x80 does not map to 0x00. The 16F876 and 16F877 devices have 256 bytes of EEPROM data memory. In these devices all 8-bits of the EEADR are used. Figure 15-3 (in the following page) is a bit map of the EECON1 register in the 16F87x.
The 16F87x EECON1 register contains one additional bit that is not present in the 16F84, named EEPGD. This bit determines if the EEPROM operation accesses program or data memory. When clear, any subsequent operations relate to EEPROM data. Otherwise, the operation accesses program memory. Read operations only require the RD bit, which initiates the read from the selected memory location. The RD bit is automatically cleared at the end of the read operation. The data in the selected memory location can be read in the EEDATA register as soon as the RD bit is set.
466 |
Chapter 15 |
bit 7 |
bit 0 |
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EEPGD |
EEIF |
WRERR |
WR |
RD |
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bit 7 EEPGD: Program/Data EEPROM select bit |
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1 |
= EEPROM program memory access |
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0 |
= EEPROM data memory access |
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bits 6-5 |
Unimplemented: Read as '0' |
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bit 4 EEIF: |
EEPROM |
Write Operation Interrupt Flag bit |
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1 |
= The write operation completed |
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(must be cleared in software) |
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0 |
= The write operation is not complete |
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or has not been started |
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bit 3 WRERR: EEPROM |
Error Flag bit |
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1 |
= |
write operation terminated prematurely |
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0 |
= |
The write operation completed |
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bit 2 WREN: |
EEPROM |
Write Enable bit |
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1 |
= |
Allows write cycles |
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0 |
= |
Inhibit write to the EEPROM |
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bit 1 WR: |
Write Control bit |
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1 |
= Initiates a write cycle. Bit is |
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cleared once write is complete. |
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Can only be set in software. |
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0 |
= Write cycle to the EEPROM is complete |
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bit 0 RD: |
Read |
Control bit |
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1 |
= Initiates an EEPROM read. Bit is |
|||||||||
cleared in hardware. Can only be set |
||||||||||
in software. |
||||||||||
0 |
= Does not initiate an EEPROM read |
|||||||||
Figure 15-3 16F87x EECON1 Register Bitmap
Write operations require two control bits, WR and WREN, and two status bits, WRERR and EEIF. The purpose of these bits is shown in Figure 15-3. Since the WREN bit enables or disables the write operation, it must be set before executing a write. The WR bit is used to initiate the write operation. This bit is automatically cleared at the end of the write. The interrupt flag bit EEIF can be use to detect when the memory write completes. The EEIF bit must be cleared by software before setting the WR bit. As soon as the WREN bit and the WR bit have been set, the desired memory address in EEADR is erased and the value in EEDATA written to the selected address.
The WRERR bit indicates when the 16F87x has been reset during a write operation. This bit should be cleared after power-on reset. The WRERR bit is set when a write operation is interrupted by a MCLR reset, or a Watchdog time-out.
Data EEPROM Programming |
467 |
Reading EEPROM Data Memory on the 16F87x
Reading an EEPROM data memory location in the 16F87x requires the following operations:
1.Write the address of the EEPROM location to be read to the EEDATA register. The address should be within the device’s memory capacity.
2.The EEPGD bit in the EECON1 registered is cleared so as to access data memory.
3.The RD bit in the EECON1 register is set to start the read operation.
4.The data can now be read from the EEDATA register.
The following code fragment shows reading EEPROM data memory in the 16F877 PIC:
;==============================
;16F877 read EEPROM data ;==============================
;Procedure to read EEPROM on-board memory
;ON ENTRY:
;Address of EEPROM memory location to read is stored in
;local register EEMemAdd
;ON EXIT:
;Read data in w
EERead:
Bank2 |
||
movf |
EEMemAdd,W |
; EEPROM address |
movwf |
EEADR |
; to read from |
Bank3 |
||
bcf |
EECON1,EEPGD |
; Point to Data memory |
bsf |
EECON1,RD |
; Start read |
Bank2 |
||
movf |
EEDATA,W |
; Data to w register |
Bank0 |
||
Return |
Writing to EEPROM Data Memory in the 16F87x
Writing to 16F87x EEPROM data memory is more complex than on the 16F84 and much more complex than the read operation. The process consists of the following operations:
1.Make sure that a previous write operation is not in progress. This step is not necessary if write completion is checked at the end of the write routine.
2.The address to be accessed is stored in the EEADR register. Code should make certain that the address is within the device’s range.
3.The data to be written is stored in the EEDATA register.
4.The EEPGD bit in the EECON1 register is cleared to select data memory access.
5.The WREN bit in the EECON1 register is set to enable the write function.