Файл: Microcontroller Programming. Thi Micro Chip PIC (Julio Sanchez, 2007).pdf
ВУЗ: Не указан
Категория: Не указан
Дисциплина: Не указана
Добавлен: 14.06.2025
Просмотров: 8560
Скачиваний: 0
468 |
Chapter 15 |
6.Interrupts are disabled to make sure the operation is not interrupted.
7.Three special operations are now executed:
The value 0x55 is written to the EECON2 register.
The value 0xaa is written to the EECON2 register.
The WR bit in the EECON1 register is set.
8.Interrupts are enabled if the application uses interrupts.
9.The WREN bit is cleared to prevent accidental write operations.
10.The completion of the write operation can be ascertained either by checking that the WR bit is clear or that EEIF interrupt flag bit is set.
The following code fragment is a procedure to write EEPROM data:
;==============================
;16F87x write EEPROM data ;==============================
;Procedure to write data byte to EEPROM memory
;ON ENTRY:
;Address to write stored in local register EEMemAdd
;Data byte to write is in local register EEByte EEWrite:
Bank3
Wait2Start:
btfsc |
EECON1,WR |
; Wait for |
goto |
Wait2Start |
; write to finish |
Bank2 |
||
movf |
EEMemAdd,w |
; Address to |
movwf |
EEADR |
; SFR |
movf |
EEByte,w |
; Data to |
movwf |
EEDATA |
; SFR |
Bank3 |
||
bcf |
EECON1,EEPGD |
; Point to Data memory |
bsf |
EECON1,WREN |
; and enable writes |
; Disable interrupts. Can be done in any case |
||
bcf |
INTCON,GIE |
|
; Write special codes |
||
movlw |
0x55 |
; First code is 0x55 |
movwf |
EECON2 |
|
movlw |
0xaa |
; Second code is 0xaa |
movwf |
EECON2 |
|
bsf |
EECON1,WR |
; Start write operation |
nop |
; Time for write |
|
nop |
||
; Test for end of write operation |
||
wait2End: |
||
btfsc |
EECON1,WR |
; Wait until WR clear |
Data EEPROM Programming |
469 |
goto wait2End
;Re-enable interrupts if program uses interrupts
;If not, comment out next line
; |
bsf |
INTCON,GIE |
|
bcf |
EECON1,WREN |
; Prevent accidental writes |
|
Bank0 |
|||
Return |
GFR Access Issue in the 16F87x
Data memory space in the 16F87x is partitioned into four separate banks, labeled bank 0 to bank 3. The RP1 and RP0 bits in the Status register are used to select which one of the banks is currently accessible. In programming the Special Functions Registers it is necessary to find out on which bank a register is located to select it. The previous code fragment (the write EEPROM data procedure) requires three bank shifts since EEPROM special function registers are located in several banks.
In this context, we sometimes forget that in some PICs the user registers, also called the General Purpose Registers, can also be located in any one of the banks, although most applications locate the GPRs in bank 0. In the 16F87x there are 96 bytes of available space in bank 0 that can be used. So if the registers used by the application are allocated in this first bank (actually in the first 80 bytes of bank 0) then code must select bank 0 before accessing this data. Had this been the case, the preceding code fragment would have required four additional bank changes.
We were able to avoid this difficulty by placing the program GPRs in the bank 0 memory space from 0x70 to 0x7f. In the 16F87x, addresses 0x70 to 0x7f (15 bytes) are mirrored in the other three banks. In contrast, any GPR allocated below address 0x70 in bank 0 can be accessed only when bank 0 is selected. The 16x84 programmer may not be aware of this fact, since in the 16F84, the memory area available for GPRs, although physically located in bank 0, is mirrored in bank 1.
In the 16F87x, it is good programming practice to locate the most used GPRs in the 0x70 to 0x7f area so as to avoid unnecessary bank changes. Since the space is limited to 15 bytes, the programmer must exercise good judgment in deciding which registers to place in this area.
15.0.3 16F87x EEPROM Circuit and Program
The program Ser2EEP, in the book’s online software, is a demonstration of EEPROM memory access on the 16F877 PIC. The program receives character data through the RS-232 line and stores them in EEPROM data memory. Received characters are echoed on the second LCD line. When the <Enter> key is detected, the text stored in EEPROM memory is displayed on the LCD. On startup, the top LCD line displays the prompt: “Receiving:”. At that time, a message “Rdy-” is sent through the serial line so as to test the connection. Serial communications run at 2400 baud, no parity, 1 stop bit, and 8 character bits. Figure 15-4 (in the following page) shows the circuit used by the Ser2EEP program.
470 |
Chapter 15 |
|||||||||||||||||||
+5v |
||||||||||||||||||||
RESET |
||||||||||||||||||||
|
R=10K |
||||||||||||||||||||
1 |
40 |
|||||||||||||||||||
RB7/PGD |
||||||||||||||||||||
!MCLR/VPP 16F877 |
||||||||||||||||||||
2 |
39 |
|||||||||||||||||||
RA0/AN0 |
RG6/PGC |
|||||||||||||||||||
3 |
38 |
|||||||||||||||||||
RB5 |
||||||||||||||||||||
RA1/AN1 |
||||||||||||||||||||
4 |
37 |
|||||||||||||||||||
RB4 |
||||||||||||||||||||
RA2/AN2.VREF- |
||||||||||||||||||||
5 |
36 |
|||||||||||||||||||
RB3/PGM |
||||||||||||||||||||
RA3/AN3/VREF+ |
LCD |
|||||||||||||||||||
6 |
RB2 |
35 |
||||||||||||||||||
RA4/TOCKI |
||||||||||||||||||||
7 |
34 |
|||||||||||||||||||
RB1 |
2 rows x 20 |
|||||||||||||||||||
RA5/AN4/SS |
||||||||||||||||||||
8 |
RB0/INT |
33 |
||||||||||||||||||
RE0/!RD/AN5 |
||||||||||||||||||||
9 |
32 |
|
RE1/!WR/AN6 |
VDD |
14 |
10 |
VSS |
31 |
|||||||||||||||||||||||||||||
RE2/!CS/AN7 |
|||||||||||||||||||||||||||||||
+5v |
11 |
30 |
|||||||||||||||||||||||||||||
RD7/PSP7 |
|||||||||||||||||||||||||||||||
12 |
VDD |
||||||||||||||||||||||||||||||
29 |
|||||||||||||||||||||||||||||||
VSS |
RD6/PSP6 |
||||||||||||||||||||||||||||||
13 |
OSC1/CLKIN |
RD5/PSP5 |
28 |
||||||||||||||||||||||||||||
14 |
OS2/CLKOUT |
RD4/PSP4 |
27 |
||||||||||||||||||||||||||||
10 MHz |
15 |
26 |
|||||||||||||||||||||||||||||
RC0/T1OSO/T1CKI |
RC7/RX/DT |
||||||||||||||||||||||||||||||
Osc |
16 |
25 |
|||||||||||||||||||||||||||||
RC1/T1OSI/CCP2 |
RC6/TX/CK |
RS |
|||||||||||||||||||||||||||||
17 |
RC2/CCP1 |
RC5/SD0 |
24 |
||||||||||||||||||||||||||||
18 |
23 |
||||||||||||||||||||||||||||||
RC3/SCK/SCL |
RC4/SDI/SDA |
||||||||||||||||||||||||||||||
19 |
RD0/PSP0 |
RD3/PSP3 |
22 |
E |
|||||||||||||||||||||||||||
20 |
RD1/PSP1 |
RD2/PSP2 |
21 |
||||||||||||||||||||||||||||
R/W
+5 V |
|||||||||
+5 V |
|||||||||
DB-9 |
1 |
||||||||
1 |
MAX203 |
16 |
|||||||
(female) |
C1+ |
+5v |
|||||||
2 |
15 |
||||||||
GND |
|||||||||
V+ |
|||||||||
5 |
4 |
3 |
2 |
1 |
3 |
14 |
|||
T1out |
|||||||||
C1- |
|||||||||
9 |
8 |
7 |
6 |
4 |
R1in |
13 |
|||
C2+ |
|||||||||
HD44780 |
|||||||||
C2- |
R1out |
12 |
|||||||
5 |
|||||||||
6 |
T1in |
11 |
|||||||
V- |
|||||||||
7 |
T2in |
10 |
|||||||
T2out |
|||||||||
8 |
R2out |
9 |
|||||||
R2in |
|||||||||
Figure 15-4 Circuit for the Ser2EEP Demonstration Program
The program’s main driver routine, constants, and user registers are as follows:
;============================================================
; M A C R O S
;============================================================ ; Macros to select the register banks
Bank0 |
MACRO |
; Select RAM bank 0 |
bcf |
STATUS,RP0 |
|
bcf |
STATUS,RP1 |
|
ENDM |
||
Bank1 |
MACRO |
; Select RAM bank 1 |
bsf |
STATUS,RP0 |
|
bcf |
STATUS,RP1 |
|
ENDM |
Data EEPROM Programming |
471 |
Bank2 |
MACRO |
; Select RAM bank 2 |
bcf |
STATUS,RP0 |
|
bsf |
STATUS,RP1 |
|
ENDM |
||
Bank3 |
MACRO |
; Select RAM bank 3 |
bsf |
STATUS,RP0 |
|
bsf |
STATUS,RP1 |
|
ENDM |
;=====================================================
; constant definitions
; for PIC-to-LCD pin wiring and LCD line addresses ;=====================================================
#define E_line 1 |
;| |
|
#define RS_line 0 |
;| — from wiring diagram |
|
#define RW_line 2 |
;| |
|
; LCD line addresses (from LCD data sheet) |
||
#define LCD_1 |
0x80 |
; First LCD line constant |
#define LCD_2 |
0xc0 |
; Second LCD line constant |
#define LCDlimit .20; Number of characters per line #define spbrgVal .64; For 2400 baud on 10Mhz clock
;Note: The constants that define the LCD display
;line addresses have the high-order bit set
;so as to meet the requirements of controller
;commands.
;
;========================================================== ; General Purpose Variables ;==========================================================
;Local variables
;Reserve 20 bytes for string buffer cblock 0x20
strData endc
;Other data
cblock 0x34 |
; Start of block |
count1 |
; Counter # 1 |
count2 |
; Counter # 2 |
count3 |
; Counter # 3 |
J |
; counter J |
K |
; counter K |
bufAdd |
|
index |
|
store1 |
; Local storage |
store2 |
|
Endc |
472 |
Chapter 15 |
;==============================
;Common RAM area ;==============================
;These GPRs can be accessed from any bank.
;15 bytes are available, from 0x70 to 0x7f
cblock |
0x70 |
; For LCDscroll procedure |
|
LCDcount |
; Counter for characters per line |
LCDline |
; Current display line (0 or 1) |
; Communications variables |
|
newData |
; not 0 if new data received |
ascVal |
|
errorFlags |
|
; EEPROM-related variables |
|
EEMemAdd |
; EEPROM address to access |
EEByte |
; Data byte to write |
endc |
|
;============================================================
; P R O G R A M
;============================================================
org |
0 |
; start at address |
goto |
main |
|
; Space for interrupt handlers |
||
org |
0x08 |
|
main: |
||
;Wiring:
;LCD data to Port-D, lines 0 to 7
;E line -> Port-E, 1
;RW line -> Port-E, 2
;RS line -> Port-E, 0
;Set PORTE D and E for output
;First, initialize Port-B by clearing latches clrf STATUS
clrf PORTB
;Select bank 1 to TRIS Port-D for output Bank1
;TRIS Port-D for output. Port-D lines 4 to 7 are wired
;to LCD data lines. Port-D lines 0 to 4 are wired to LEDs. movlw b’00000000’
movwf |
TRISD |
; and Port-D |
;By default Port-A lines are analog. To configure them
;as digital code must set bits 1 and 2 of the ADCON1
;register (in bank 1)
movlw |
0x06 |
; binary 0000 0110 is code to |
; make all Port-A lines |
||
digital |
||
movwf |
ADCON1 |
; Port-B, lines are wired to keypad switches, as follows: