Файл: Microcontrollers in Practice (Mitescu M., 2005).pdf

A.3 HC11 Instruction Set

217

Mnemonic

Operation

Description

Flags

LSR(opr)

Logical shift right

0

→ b7 → b6 . . . b0 → C

N,Z,V,C

LSRA

Logical shift right A

0

→ b7 → b6 . . . b0 → C

N,Z,V,C

LSRB

Logical shift right B

0

→ b7 → b6 . . . b0 → C

N,Z,V,C

LSRD

Logical shift right Double

0

→ b15 → . . . → b0 → C

N,Z,V,C

MUL

Multiply A by B

A × B → D

C

NEG(opr)

Tow’s complement memory byte

0

− M → M

N,Z,V,C

NEGA

Tow’s complement A

0

− A → A

N,Z,V,C

NEGB

Tow’s complement B

0

− B → B

N,Z,V,C

NOP

No operation

No operation

ORAA (opr)

OR Accumulator A

A M → A

N,Z,V

ORAB (opr)

OR Accumulator B

B M → B

N,Z,V

PSHA

Push A onto Stack

A → Stk, SP = SP − 1

PSHB

Push B onto Stack

B → Stk, SP = SP − 1

PSHX

Push X onto Stack(Lo First)

IX → Stk, SP = SP − 2

PSHY

Push Y onto Stack(Lo First)

IY → Stk, SP = SP − 2

PULA

Pull A from Stack

SP = SP + 1, A ← Stk

PULB

Pull B from Stack

SP = SP + 1, B ← Stk

PULX

Pull X from Stack (Hi First)

SP = SP + 2, IX ← Stk

PULY

Pull Y from Stack (Hi First)

SP = SP + 2, IY ← Stk

ROL (opr)

Rotate Left Memory

b0 ← C ← b7 ← b6

N,Z,V,C

. . . ← b0

ROLA

Rotate Left A

b0 ← C ← b7 ← b6

N,Z,V,C

. . . ← b0

ROLB

Rotate Left B

b0 ← C ← b7 ← b6

N,Z,V,C

. . . ← b0

ROR (opr)

Rotate Right Memory

b7 → b6 . . . b0 → C → b7

N,Z,V,C

RORA

Rotate Right A

b7 → b6 . . . b0 → C → b7

N,Z,V,C

RORB

Rotate Right B

b7 → b6 . . . b0 → C → b7

N,Z,V,C

RTI

Return from Interrupt

N,Z,V,C

RTS

Return from Subroutine

A − B → A

SBA

Subtract B from A

N,Z,V,C

SBCA (opr)

Subtract with Carry from A

A − M − C → A

N,Z,V,C

SBCB (opr)

Subtract with Carry from B

B − M − C → B

N,Z,V,C

SEC

Set Carry

1

→ C

C

SEI

Set Interrupt Mask

1

→ I

I

SEV

Set Overflow Flag

1

→ V

V

STAA (opr)

Store Accumulator A

A → M

N,Z,V

STAB (opr)

Store Accumulator B

B → M

N,Z,V

STD (opr)

Store Accumulator D

A → M, B → M + 1

N,Z,V

STOP

Stop Internal Clocks

SP → M : M + 1

STS (opr)

Store Stack Pointer

N,Z,V

STX (opr)

Store Index Register X

IX → M : M + 1

N,Z,V

STY (opr)

Store Index Register Y

IY → M : M + 1

N,Z,V

SUBA (opr)

Subtract Memory from A

A − M → A

N,Z,V,C

SUBB (opr)

Subtract Memory from B

B − M → B

N,Z,V,C

SUBD (opr)

Subtract Memory from D

D − (M : M + 1) → D

N,Z,V,C

SWI

Software Interrupt

I

218

Appendices

Mnemonic

Operation

Description

Flags

TAB

Transfer A to B

A → B

N,Z,V

TAP

Transfer A to CC Register

A → CCR

All

TBA

Transfer B to A

B → A

N,Z,V

TEST

TEST (Only in Test Modes)

Address Bus Counts

TPA

Transfer CC Register to A

CCR → A

TST (opr)

Test for Zero or Minus

M − 0

N,Z,V,C

TSTA

Test A for Zero or Minus

A − 0

N,Z,V,C

TSTB

Test B for Zero or Minus

B − 0

N,Z,V,C

TSX

Transfer Stack Pointer to X

SP + 1 → IX

TSY

Transfer Stack Pointer to Y

SP + 1 → IY

TXS

Transfer X to Stack Pointer

IX − 1 → SP

TYS

Transfer Y to Stack Pointer

IY − 1 → SP

WAI

Wait for Interrupt

Stack Regs & WAIT

XGDX

Exchange D with X

IX → D, D → IX

XGDY

Exchange D with Y

IY → D, D → IY

222

Appendices

TITLE PROGRAMMING THE CONFIG REGISTER

INCLUDE 68HC11F1.DEF

NEWCFG

EQU

$0F

*EEPGM

EQU

$01

*EELAT

EQU

$02

*ERASE

EQU

$04

BYTE

EQU

$20

ENDRAM

EQU

$1FF

;valid for E9 too

CR

EQU

$0D

SP

EQU

$20

CODE

;no ORG!!

START

LDS

#ENDRAM

;init SP

LDAA

SCSR

;clear SCI flags if any

LDAA

SCDR

CLR

BPROT

REC05

LDAA

SCSR

;wait a character from SCI

ANDA

#$20

BEQ

REC05

REC10

LDAA

SCDR

;get character

CMPA

#CR

BEQ

E2W

;if CR write new value

CMPA

#SP

BEQ

SENDC

;if SP send current value

BRA

REC05

;endless loop

E2W

LDY

#CONFIG

BSR

E2BE

;erase it first

LDAB

#EELAT

STAB

PPROG

LDAA

#NEWCFG

STAA

CONFIG

;latch the address

ORAB

#EEPGM

STAB

PPROG

BSR

DLY10

;wait about 10ms

SENDC

LDAA

SCSR

ANDA

#$80

;transmit complete?

BEQ

SENDC

LDAA

CONFIG

STAA

SCDR

BRA

REC05

;back to start

*LOCAL SUBROUTINES

E2BE

LDAB

#$16

;BYTE=1,ERASE=1,EELAT=1

STAB

PPROG

STAB

0,Y

;latch address

LDAB

#$17

;make EEPGM=1

STAB

PPROG

;start Vpp (charge pump)

BSR

DLY10

CLR

PPROG

;stop Vpp and return to read

RTS

DLY10

LDX

#$3000