12. One Bit at a Time 351
Program 12.14 Reading in a byte using the I2C protocol.
;*************************************************************
;* FUNCTION: Reads in byte from Slave with optional ACK/NACK *
; * |
ENTRY |
: |
ACKNO |
= 00 for |
ACK ELSE NACK |
* |
; * |
RESOURCE: |
START |
and STOP |
subroutines, Delay_600 macro |
* |
; |
* |
EXIT |
: |
DATA_IN holds datum sent from slave |
* |
; |
* |
EXIT |
: |
ACK or NACK sent to Slave, SCL low |
* |
; *************************************************************
I2C_IN |
bcf |
INDF,SCL |
; Make sure that Clock line is low |
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movlw |
8 |
; Loop count = 8 |
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movwf |
COUNT |
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I2C_IN_LOOP |
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bcf |
INDF,SCL |
; Clock low |
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Delay_600 |
; For minimum period |
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Delay_600 |
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bsf |
INDF,SCL |
; Clock high |
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bcf |
STATUS,C |
; Carry = 0 |
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btfsc |
INDF,SDA |
; Check state of incoming bit? |
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bsf |
STATUS,C |
; IF 1 THEN make Carry = 1 |
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rlf |
DATA_IN,f |
; and rotate it into the datum |
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decfsz |
COUNT,f |
; Decrement loop count |
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goto |
I2C_IN_LOOP |
; and repeat eight times |
; Now determine if Acknowledge is to be sent |
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bcf |
INDF,SCL |
; Clock low |
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bsf |
INDF,SDA |
; Data output float (NACK) |
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movf |
ACKNO,f |
; Test the caller’s wish |
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btfsc |
STATUS,Z |
; IF non zero THEN leave as NACK |
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bcf |
INDF,SDA |
; ELSE bring low to signal ACK |
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Delay_600 |
; Keep Clock low |
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Delay_600 |
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bsf |
INDF,SCL |
; Now high |
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Delay_600 |
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bcf |
INDF,SCL |
; Leave with Clock low |
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return |
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to the I2C time and protocol specification as in our I2C_OUT subroutine of Program 12.7. In this protocol the Master signals back to the Slave to stop sending data by letting the SDA line float high in the Acknowledge slot in the ninth clock pulse – see Fig. 12.13. The normal low state in this slot is called ACK, whilst the deviant high Acknowledge state is called NACK (No ACKnowledge). To cope with both these situations our I2C_IN optionally generates either situation depending on the state of the variable ACKNO set by the caller. If file register ACKNO is zero on entry then a normal low ACK is sent in this slot. Any non-zero value in this variable causes a high NACK to be sent back to the Slave. The Slave then terminates its transmission and listens for the next Stop/Start condition.
352 The Quintessential PIC Microcontroller
Example 12.3
Many MCU-based products require storage of data in non-volatile memory for retrieval after the system has been powered down. A typical example is the total distance travelled by a car from new, which should be held independently of the state of the car battery. Such data is typically held in Electrically-Erasable Programmable Read-Only Memory (EEPROM) as described on page 28. Many EEPROM devices are available which interface to SPI and I2C, specifically the I2C 24LCXXX shown in Fig. 12.22. The 24LCXXX 8-pin serial EEPROMs vary from the 1 kbit 24LC01B to the 256 kbit 24LC256, organized as bytes; i.e. 128 byte to 32 kbyte.
PIC |
+5V |
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1K8 |
1K8 |
[24XXX] |
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SDA |
5 |
SDA |
VSS |
4 |
SCL |
6 |
SCL |
A2 |
3 |
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7 |
WP |
A1 |
2 |
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8 |
VDD |
A0 |
1 |
Fig. 12.22 The 24XXX series of I2C serial EEPROMs.
The 24XXX serial EEPROMs have the following features.
•400 kHz I2C compatible (VDD = 5 V), 100 kHz at VDD = 2.5 V.
•Write protection (ROM mode) using the WP pin.
•2 ms typical Write cycle time.
•1,000,000 minimum16 Write cycle endurance per byte cell.
•3 mA Write, 1 mA Read and 100 µs standby current.
•Internal generation of high programming voltage.
Using a 24LC01B serial EEPROM, show how you could increment a number in the bottom three locations which represents the total distance in either miles or kilometers depending on the market. You may assume that the PIC is interrupted on each mile/kilometer and that this software is part of the interrupt handler. You have the resources of the subroutines of Program 12.7 and 12.14.
Solution
Before writing code to implement our specification we need to look more closely at the protocol used by the 24XXX serial EEPROMs in communi-
16100,000 in the 24LC128 and 24LC256 devices.
12. One Bit at a Time 353
cating with the Master PIC. This is encapsulated in the messages shown in Fig. 12.23.
In all cases the Master initiates a data transfer by sending a Start condition followed by a Command byte. The Control byte contains the I2C Slave address 1010; the chip select address A2 A1 A0 and the R/W bit in
the order 1 0 1 0 A2 A1 A0 R/W . Although the chip select address is shown as part of the Command byte and the three corresponding pins are shown in Fig. 12.22, newer versions of the smaller EEPROMS do not implement this feature. This is because if EEPROM capacity needs to be expanded then it more e cient to replace the device by a pin-identical larger version. For example replacing a 24LC01B by a 24LC08B gives an eightfold increase with no hardware alteration. Larger EEPROMS, such as the 24LC256 do implement chip select address as the method of expansion as additional devices will need to be hung on the bus in this situation. Eight 24LC256s will give a capacity of 256 kbyte of non volatile memory.
This is normally followed by the address in the EEPROM that data is to be written into or read out of. In the specific case of the 24LC01B the data is arranged as 128 cells, each comprising a byte that can be individually written to or read from. This means that a 7-bit address will fit comfortably in the 8-bit address byte. This scheme will cope with devices up to the 24LC02B but beyond this addresses greater than 8 bit wide are needed. This is done by using the Chip select bits in the Command bit, giving an address width of 11 bits and a capacity of 2 kbytes (16 kbits). For EEPROMs larger than the 24LC16 two Address bytes are used following the Command byte.
The process of sending the byte address to the EEPROM is implemented as a Write action in Fig. 12.23. This is actioned by setting the R/W bit low in the command bit. Where a data byte is to be written into the addressed location this byte comes immediately after the Address byte and then followed by a Stop condition. If more than one data byte is transmitted before the Stop then this data is stored in a small on-board bu er and the actual programming will not occur until the Stop condition. The 24LC01B can store eight bytes at a time in a single page, with the lower three address bits being incremented on each data byte sent. If this address rolls over, earlier addressed data will be overwritten. The size of this page depends on the device; for example, the 24LC256 uses a 64-byte page. In Fig. 12.23(a) three bytes are shown being written into the 24LC01B. As these locations are to be targeted in the bottom three locations, 00-01-02h, then roll-over will not occur.
As soon as the Stop condition is received the 24LC01B will commence programming the targeted cells with the bu ered data. This process takes typically 2–5 ms across the family. If the Master attempts to initiate a process during this time then the EEPROM will not Acknowledge
354 The Quintessential PIC Microcontroller
Program 12.15 Incrementing the non-volatile odometer count.
EXTRA_MILE |
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Get the three bytes at 00:01:02h |
call |
START |
; |
Start a transmission packet |
; Command byte |
1 to initialize |
address |
movlw |
b’10100000’; |
Slave address Master-Write |
movwf |
DATA_OUT |
; |
Copied to pass location |
call |
I2C_OUT |
; |
Send it out |
movf |
ERR,f |
; |
Check for an Acknowledge error |
btfsc |
STATUS,Z |
; |
IF Zero THEN continue |
goto |
EXTRA_MILE |
; |
ELSE try again |
; Address 00 |
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clrf |
DATA_OUT |
; |
Pass location |
call |
I2C_OUT |
; |
Send it out |
; Command byte |
2 to change over to Read |
call |
START |
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movlw |
b’10100001’; |
Slave address Master-Read |
movwf |
DATA_OUT |
; |
Copied to pass location |
call |
I2C_OUT |
; |
Send it out |
; Now read in three bytes
clrf |
ACKNO |
call |
I2C_IN |
movf |
DATA_IN,w |
movwf |
MSB |
call |
I2C_IN |
movf |
DATA_IN,w |
movwf |
NSB |
incf |
ACKNO,f |
call |
I2C_IN |
movf |
DATA_IN,w |
movwf |
LSB |
call |
STOP |
; Now increment 3-byte array
incf |
LSB,f |
btfss |
STATUS,Z |
goto |
PUT_BACK |
incfsz |
NSB,f |
goto |
PUT_BACK |
incf |
MSB,f |
;Enable Acknowledge
;Read the High byte in 00h
;Get byte
;and put in memory
;Read the Middle byte in 01h
;Get byte
;and put in memory
;Signal a NACK
;Read the Low byte in 02h
;Get byte
;and put in memory
;End of Read process
;Add one
;Is it now zero
;IF not THEN continue
;ELSE increment middle byte
;IF not zero THEN continue
PUT_BACK call |
START |
; Start the Write process |
movlw |
b’10100000’; Write state |
movwf |
DATA_OUT |
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call |
I2C_OUT |
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clrf |
DATA_OUT |
; Address 00h |
call |
I2C_OUT |
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movf |
MSB,w |
; Get the new High byte |
movwf |
DATA_OUT |
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call |
I2C_OUT |
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movf |
NSB,w |
; Get the new Middle byte |
movwf |
DATA_OUT |
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call |
I2C_OUT |
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movf |
LSB,w |
; Get the new Low byte |
movwf |
DATA_OUT |
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call |
I2C_OUT |
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call |
STOP |
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1 0 1 0 X X X 0 0 Byte address
(a) Writing three bytes.
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Start
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Write ACK
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ACK
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1 |
0 |
1 |
0 X X X 0 0 |
Byte address |
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Start
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Read ACK
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ACK
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1 |
0 |
1 |
0 X X X |
1 |
0 |
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Byte 0 |
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(b) Reading three bytes.
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12. One Bit at a Time |
355 |
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ACK
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ACK
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Stop
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Byte 0 |
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Byte 1 |
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Byte 2 |
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ACK
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NACK Stop
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Byte 1 |
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Byte 2 |
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Fig. 12.23 EEPROM Read and Write waveforms.
following the Start-Control and byte and this can be used as a busy indicator. This polling is shown when the first Control byte is sent out in Program 12.15.
The opposite process of reading bytes from the EEPROM is slightly more involved. As in the previous case a start address has to be written into the device. After this occurs a repeat Start condition is sent with the following Control byte having its R/W bit high to indicate Read. The Slave then transmits the byte at the specified location to the Master which Acknowledges receipt and the process continues indefinitely with the address incrementing until the Master does not send an Acknowledge. The Slave then releases the bus and the Master is free to issue a Stop condition. If the initial writing of the start address is omitted then one beyond the last used address is the additional location read from.
The software listed in Program 12.15 follows the process outlined in Fig. 12.23 exactly. Once the initial address 00h has been sent the Master goes into a listen mode and three sequential bytes are read from memory terminated by the Master by returning a NACK condition followed by Stop. With the triple-byte distance count in locations MSB:NSB:LSB the array is incremented in the usual way. Finally address 00h is again written out to the EEPROM followed by the three updated bytes and the process terminated by the Master transmitting Stop.
356 The Quintessential PIC Microcontroller
Example 12.4
It is possible to combine some of the attributes of synchronous I2C and asynchronous signalling to send data asynchronously in both directions half-duplex along a single link. One example of this is the 1-Wire17 interface outlined in Fig. 12.24.
DS1820
32 1
+5V |
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To other 1-Wire devices |
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(a) Connecting the DS1820 to a |
PIC |
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Start
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Relax Start
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0 |
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1 |
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Slave reads |
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Slave reads |
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Slot |
(60 - 120µs) |
>1µs |
>1µs |
Slot |
(60 - 120µs) |
(b) Master |
Write |
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Relax Start
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Start
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15µs |
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15µs |
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Master |
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Master |
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Reads 0 |
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Reads 1 |
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>1µs |
Slot |
(60 - 120µs) |
>1µs |
>1µs |
Slot |
(60 - 120µs) |
(c) Master Read
Fig. 12.24 Interfacing the DS1820 1-Wire digital thermometer.
In Fig. 12.24(a) a Dallas Semiconductor DS1820 digital thermometer is shown driven from a single port line with the MCU acting as a 1-Wire Master.
The DS1820 has the following features.
•Measures temperature from −55◦C to +125◦C in 0.5◦C steps as a signed 16-bit datum.
•Converts temperature in 500 ms maximum.
•Zero standby current.
•Can be powered in certain limited circumstances from the data line.
•Multidrop capability.
171-Wire is a trademark of Dallas Semiconductor.