Файл: Microcontroller Programming. Thi Micro Chip PIC (Julio Sanchez, 2007).pdf

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Mid-range Instruction Set

639

INCFSZ	Increment f, Skip if 0
Syntax:	[ label ] INCFSZ f,d
Operands:	f in range 0 to 127
	d is either 0 or 1
Operation:	(f) + 1 -> destination, skip if result = 0
Status Affected:	None
Description:	The contents of register 'f' are incremented. If
	'd' is 0 the result is placed in the w register. If 'd'
	is 1 the result is placed back in register 'f'.
	If the result is 0, then the next instruction
	(fetched during the current instruction
	execution) is discarded and a NOP is executed
	instead, making this a 2 cycle instruction.
Words:	1
Cycles:	1(2)
Example
Here:
	incfsz	count,1
	goto	Here
Case 1:
Before Instruction:			PC = $
			count = 0x10
After Instruction:			count = 0x11
			PC = $ + 1 (goto executed)
Case 2:
Before Instruction:			PC = $
			count = 0x00
After Instruction:			count = 0x01
			PC = $ + 2 (goto skipped)

640 Appendix C

IORLW	Inclusive OR Literal with w
Syntax:	[ label ] IORLW k
Operands:	k is in range 0 to 255
Operation:	(w).OR. k -> w
Status Affected:	Z
Description:	The contents of the w register is OR’ed with
	the eight bit literal 'k'. The result is placed in the
	w register.
Words:	1
Cycles:	1

Example 1

iorlw myreg
Before Instruction:	w = 0x9a
Myreg is a variable representing a location
in PIC RAM.	[Myreg] = 0x37
After Instruction:	w = 0x9F
	Z = 0
Example 3

iorlw 0x00

Before Instruction:	w	=	0x00
After Instruction:	w	=	0x00

Mid-range Instruction Set

641

IORWF		Inclusive OR w with f
Syntax:	[ label ] IORWF f,d
Operands:	f is in range 0 to 127
	d is either 0 or 1
Operation:	(W).OR. (f) -> destination
Status Affected:	Z
Description:	Inclusive OR the w register with register 'f'. If 'd'
	is 0 the result is placed in the w register. If 'd' is
	1 the result is placed back in register 'f'.
Words:	1
Cycles:	1
Example 1
	iorwf	result,0
	Before Instruction:		result = 0x13
			w = 0x91
	After Instruction:		result = 0x13
			w = 0x93
			Z = 0
Example 2
	iorwf	INDF,1
	Before Instruction:		w = 0x17
			FSR = 0xc2
			[FSR] = 0x30
	After Instruction:		w = 0x17
			FSR = 0xc2
			[FSR] = 0x37
			Z = 0
Example 3
	iorwf	result,1
Case 1:	Before Instruction:		result = 0x13
			w = 0x91
	After Instruction:		result = 0x93
			w = 0x91
			Z = 0
Case 2:	Before Instruction:		result = 0x00
			w = 0x00
	After Instruction:		result = 0x00
			w = 0x00
			Z = 1

642 Appendix C

MOVF	Move f
Syntax:	[ label ] MOVF		f,d
Operands:	f is in range 0 to 127
	d is either 0 or 1
Operation:	(f) -> destination
Status Affected:	Z
Description:	The contents of register ’f’ is moved to a
	destination dependent upon the status of ’d’. If
	’d’ = 0, destination is W register. If ’d’ = 1, the
	destination is file register ’f’ itself. ’d’ = 1 is
	useful to test a file register since status flag Z
	is affected.
Words:	1
Cycles:	1
Example 1
	movf	FSR,0
	Before Instruction:		w = 0x00
			FSR = 0xc2
	After Instruction:		w = 0xc2
			Z = 0
Example 2
	movf	INDF,0
	Before Instruction:		w = 0x17
			FSR = 0xc2
			[FSR] = 0x00
	After Instruction:		w = 0x17
			FSR = 0xc2
			[FSR] = 0x00
			Z = 1
Example 3
	movf	FSR,1
Case 1:	Before Instruction:		FSR = 0x43
	After Instruction:		FSR = 0x43
			Z = 0
Case 2:	Before Instruction:		FSR = 0x00
	After Instruction:		FSR = 0x00
			Z = 1

Mid-range Instruction Set

643

MOVLW	Move Literal to w
Syntax:	[ label ] MOVLW k
Operands:	k in range 0 to 255
Operation:	k- > w
Status Affected:	None
Description:	The eight bit literal 'k' is loaded into W register.
	The don’t cares will assemble as 0’s.
Words:	1
Cycles:	1

Example 1

644 Appendix C

MOVWF	Move w to f
Syntax:	[ label ] MOVWF f
Operands:	f in range 0 to 127
Operation:	(w) -> f
Status Affected:	None
Description:	Move data from W register to register 'f'.
Words:	1
Cycles:	1

Example 1

movwf INDF