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9.4

Description of the Software Components

127

T100MS5

DS

1

T100MS6

DS

1

T100MS7

DS

1

T1S0

DS

1

;1 second timers

T1S1

DS

1

T1S2

DS

1

T1S3

DS

1

T1S4

DS

1

T1S5

DS

1

T1S6

DS

1

T1S7

DS

1

T1M0

DS

1

;1 minute timers

T1M1

DS

1

T1M2

DS

1

T1M3

DS

1

T1M4

DS

1

T1M5

DS

1

T1M6

DS

1

T1M7

DS

1

CNT100MS

DS

1

;counters

CNT1S

DS

1

CNT1M

DS

1

CODE

ORG ROMBASE

END

The TOC2 initialization routine, the interrupt service routine, and the code that scans and decrements the software timers are placed in TIMER.ASM.

To improve the readability of the program, a MACRO, called DJEQ (Decrement or Jump if EQual to zero), has been defined. It has the following structure:

DJEQ

MACRO

?dest

LOCAL

@A

TST

?dest

BEQ

@A

DEC

?dest

@A

EQU

*

ENDM

DJEQ receives a parameter, which is the symbolic address of the destination. It checks the content of the destination, and if greater than zero, it decrements it by one. If the destination is zero, DJEQ returns leaving the destination unchanged.

Here is the full listing of TIMER.ASM:

TITLE MAIN TIMER

CODE

JMP TMRMAIN


128

9 HC11 Development Board

*the initialization routine is called from INIT.ASM

ITIMER

LDAA

#$40

;clear OC2F if any

STAA

TFLG1

STAA

TMSK1

;enable TOC2 interrupt

LDX

#T4MS0

;clear all timers

LDAB

#32

IT10

CLR

0,X

INX

DECB

BNE

IT10

LDAA

#25

;init counters

STAA

CNT100MS

LDAA

#10

STAA

CNT1S

LDAA

#60

STAA

CNT1M

RTS

* TOC2 interrupt service routine

VECTOR_TOC2

TOC2ISR

LDAA

#$40

STAA

TFLG1

;clear OC2F flag

LDD

TOC2

ADDD

#8000

;next interrupt in 4 ms

STD

TOC2

INC

TIRQ

;true the flag

RTI

;return from interrupt

* main timer task

TMRMAIN

TST

TIRQ

;check for previous

JEQ

TMREXIT

;interrupt

CLR

TIRQ

DJEQ

T4MS0

;scan the 4 ms timers

DJEQ

T4MS1

DJEQ

T4MS2

DJEQ

T4MS3

DJEQ

T4MS4

DJEQ

T4MS5

DJEQ

T4MS6

DJEQ

T4MS7

DEC

CNT100MS

BEQ

TMR10

JMP

TMREXIT

TMR10

LDAA

#25

;reload counter

STAA

CNT100MS

DJEQ

T100MS0

;scan the 100 ms timers

DJEQ

T100MS1

DJEQ

T100MS2

DJEQ

T100MS3

DJEQ

T100MS4


9.5 Exercises

129

DJEQ

T100MS5

DJEQ

T100MS6

DJEQ

T100MS7

DEC

CNT1S

BEQ

TMR20

JMP

TMREXIT

TMR20

LDAA

#10

STAA

CNT1S

DJEQ

T1S0

;scan the 1 s timers

DJEQ

T1S1

DJEQ

T1S2

DJEQ

T1S3

DJEQ

T1S4

DJEQ

T1S5

DJEQ

T1S6

DJEQ

T1S7

DEC

CNT1M

BEQ

TMR30

TMR30

LDAA

#60

STAA

CNT1M

DJEQ

T1M0

;scan the 1 min timers

DJEQ

T1M1

DJEQ

T1M2

DJEQ

T1M3

DJEQ

T1M4

DJEQ

T1M5

DJEQ

T1M6

DJEQ

T1M7

TMREXIT

EQU

*

;continue with the next

END

;module

9.5 Exercises

SX 9.1

Using the software timers described in this paragraph, write a program that toggles PORTA bit 7 every 1 second, and PORTA bit 6 every 2.5 seconds.

Solution

Out of RESET, all I/O lines are configured as inputs. Therefore, we must configure the selected bits of PORTA as outputs, by adding the following lines to INIT.ASM.

LDAA

#$C0

;select PORTA bits 7 and 6

STAA

DDRA


130 9 HC11 Development Board

The main program looks like this:

INCLUDE68HC11F1.DEF

INCLUDEAS11.MAC

INCLUDEMAP.ASM

CODE

VECTOR_RESET

RESET

EQU

*

INCLUDEINIT.ASM

MLOOP

EQU

*

;main loop start

TST

T100MS0

BEQ

M10

BRA

M20

M10

LDAA

#10

;restart timer

STAA

T100MS0

LDAA

PORTA

EORA

#$80

;toggle PORTA bit 7

STAA

PORTA

M20

TST

T100MS1

;next timer

BEQ

M30

JMP

MLOOP

M30

LDAA

#25

;restart second timer

STAA

T100MS1

LDAA

PORTA

;toggle PORTA bit 6

EORA

#$40

STAA

PORTA

JMP

MLOOP

END

The program uses two timers with the quantum 100 milliseconds, T100MS0 and T100MS1, which are tested one by one in an endless loop. When a timer reaches zero, the associated I/O line is toggled, and the timer is reloaded with the desired value.

X 9.2

Write a program that reads all the analog inputs every 20 milliseconds, and updates a set of variables AN0–AN7.

X 9.3

Write a program that uses the SCI reception interrupt. Upon reception of an ASCII code for ‘A’ ($41) the program answers with the last value read from the analog input AN0. The byte is transmitted as two ASCII characters, corresponding to its hexadecimal representation.

X 9.4

Modify the schematics of the module described in this chapter, by adding an external 32 K RAM circuit, selected by CSGEN. Describe the initialization sequence in this case.


10

AVR Development Board

10.1 In this Chapter

This chapter describes a simple, yet flexible development board, based on AT90S8535, for the study of the AVR microcontrollers. This board can be used to test most of the AVR projects presented in this book.

10.2 The Hardware

The schematic of the development board is shown in Fig. 10.1. The circuit comprises the following functional blocks:

1.Microcontroller

2.Clock circuit

3.RESET circuit

4.Output buffers

5.ISP interface

6.RS232 interface

7.Power supply circuit.

The microcontroller is an AT90S8535-P in a DIP40 package. Note that this microcontroller is pin by pin, hardware compatible with other members of the analog series of AVR microcontrollers, like ATMega8535 and ATMega16. However, there are many differences between these microcontrollers. Consult the data sheets before making the replacement.

The external clock circuit uses an 8 MHz crystal, Q1, and the capacitors C10, C11 (12–47 pF). The RESET circuit consists of the resistor R1 (10 K), and the capacitor C1 (10 F/10 V). These values are not critical, because AT90S8535 contains internal signal conditioning circuits for the RESET signal.

The digital input lines are connected to PORTC, and are pulled up to Vcc with resistors. A group of LEDs has been included, to show the status of each input.