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13

Simple RS485 Network with Microcontrollers

13.1 In this Chapter

This chapter contains the description of a device capable of reading the status of a number of digital inputs, or the values of a number of analog inputs, to store this information, and to report it when it receives a specific interrogation from a master device. It is implemented using an AVR microcontroller, and uses a RS485 line to communicate with the master. The aim of this chapter is to introduce the basic concepts of distributed data acquisition systems.

13.2 The Hardware

The simple data acquisition modules described in this chapter are meant to be connected as slaves in a RS485 network, as shown in Fig. 13.1.

The master device in this network is a personal computer (PC), which uses one of the asynchronous communication ports (COM1/COM2) connected to the network through a RS232-to-RS485 interface converter.

Two different slave devices are described for this application: one, called SLD, is designed to read and report the status of three digital inputs, such as relay contacts; the other, called SLA, reads the values of three analog inputs in the range 0–2.56 V.

It is possible, in principle, to design and add more slave devices, with different functions, provided that they communicate according to the same protocol as the

RS232/485

A

B

Rx Tx DTR

SLAVE 0 SLAVE 1

SLAVE n

PC/AT

Fig. 13.1. Block diagram of the network described in this chapter


164 13 Simple RS485 Network with Microcontrollers

others. According to the recommendations of the RS485 standard, the total number of slaves connected to the same bus is limited to 32.

13.2.1 The RS232-to-RS485 Converter

This circuit converts the ±12 V voltage levels required by the RS232 interface of the PC used as a master device in the network, to differential signals compatible with the RS485 communication bus. The schematic of the circuit is presented in Fig. 13.2.

The actual RS485 interface circuit is IC3 –SN75176, described in Chap. 3. This converts TTL levels to differential signals, and its line driver can be controlled to enter a high-impedance status by means of the input DE (Driver Enable, active HIGH). This allows the implementation of a two-wire, half-duplex differential communication bus.

IC4 –MAX232 converts TTL to RS232 voltage levels and vice-versa. The inverting gate IC2A (74HC04) is used to provide proper polarity for DE, so that the interface signal DTR (Data Terminal Ready), available on pin 4 of the nine-pin interface connector, can be used to control the direction of data transfer on the RS485 bus.

The external power supply VPP = +12 V is applied on connector X1. VPP is reduced to +5 V by means of the voltage regulator IC1 –LM7805, to supply local circuits, but is also made available on the connector X2, along with the differential data lines, in order to provide power to the slave devices. For this particular application VPP must be able to deliver at least 200 mA.

Note the resistors R1, R2, connected to VCC and GND. Their purpose is to maintain the voltage levels on the data lines A and B to a steady potential when all the line drivers of the devices connected to the RS485 bus are in the high-impedance status.

VCC

IC4

VCC

C6

C1+

1

C5

IC3

2

V+

C1-

3

C4

3

R2

6

V-

4

C3

C2+

4

D DE

6

G2

5

A

X2-4

C2-

5

9

14

11

1

8

4

T1OUT

T1IN

R RE

B

7

X2-3

7

3

6

2

13

R1IN

R1OUT 12

2

G1

1

8

R2IN

R2OUT

9

IC2A

R1

X3

1

2

X2-1

VPP

GND

VPP

VCC

IC1

X1-1

IN OUT

X2-2

12V DC

C1

GND

C2

X1-2

GND

Fig. 13.2. Schematic of the RS232-to-RS485 converter


13.2 The Hardware

165

X1

IC1

2

1

C6

C2

9

5

R2

C1

C5

IC3

R1

6

1

IC4

X2

C3

IC2

X3

C4

Fig. 13.3. PCB layout for the RS232-to-RS485 converter

Figure 13.3 shows a possible layout for the printed circuit board for this circuit.

13.2.2 The Digital Input Module

This circuit shown in Fig. 13.4 is one of the simplest microcontroller structures possible.

The circuit comprises the microcontroller AVR AT90S2313, with very few external components: the RS485 interface circuit IC3 (SN75176), the voltage regulator IC1 (LM7805), and the oscillator and RESET circuits.

The digital inputs are read on the PB0–PB2 I/O lines, which must be software configured to use the internal pull-up resistors, and another I/O line, PD2, enables the line drivers of the interface circuit SN75176.

VCC

R1

IC5

C3

1

VPP

RESET

C5

X2-2

GND

4 XTAL2

X2-1

Y1

GND

5

14

XTAL1

PB2

X1-2

20

PB1

13

X1-3

C4 VCC

VCC

PB0

12

X1-4

10

GND

X1-1

VPP

GND

VCC

GND

IC1

3 IC3

PD2

6

IN OUT

4

3

DE

C1

GND

C2

TX-PD1

2

D

A

6

RX-PD0

X2-4

AT90S2313

1

R RE

7

GND

B

X2-3

2

Fig. 13.4. Schematic of the SLD module


166

13 Simple RS485 Network with Microcontrollers

IC2

VPP

IC1

VCC

INOUT

C1

GND

C2

VCC

6

VCC

GND

4

5

VCC

IC3

GND

C4

3

GND

32

3

PD2

4

D DE

GND

8

XTAL2

TX-PD1

31

A

6

X2-4

Y1

RX-PD0

30

7

XTAL1

1

VCC

R

RE

B

7

X2-3

C6

18

C5

AVCC

2

VPP

R1

20

AREF

21

AGND

PC2-ADC2

25

X1-3

X1-2

X2-2

C3

29

RESET

PC0-ADC1

24

X1-4

X2-1

PC1-ADC0

23

X1-1

GND

GND

MEGA8 16-AI

GND

Fig. 13.5. Schematic of the analog input module SLA.

13.2.3 The Analog Input Module

The schematic of the analog input module SLA is presented in Fig. 13.5.

This circuit uses a different microcontroller, ATMEGA8-16AI (IC2), which includes an ADC converter, and internal analog reference. For better protection from communication errors the circuit uses an external oscillator (Y1, C3, C4).

The analog inputs of the MCU, ADC0–ADC2, are directly connected to the external connector X1, without additional protection or conditioning circuits. The internal reference voltage is decoupled with the external capacitor C6.

The RS485 interface is identical to the one used by the digital input module SLD, described in the previous paragraph. The data direction on the bus is controlled by the I/O line PD2 of the microcontroller, which is software controlled so that, in normal operation, the local line driver is disabled, and the receiver circuit of IC3 (SN75176) is enabled. Any slave device is allowed to take control of the communication bus only when it receives a specific query from the master.

The power supply voltage for the circuits VCC is prepared using the voltage regulator IC1 (LM7805), and the filter capacitors C1, C2, starting from the external voltage VPP. Normally, VPP is common for all slaves.

13.2.4 Using the AVR Development Board to Emulate Thel SLD and SLA Modules

The AVR development bard described in Chap. 10 can be used to emulate the functions of the SLD and SLA modules and to test the software for the implementation of the network protocol. A simple hardware modification is required for this, as shown in Fig. 13.6.


13.3 The Software

167

SN75176

PD2

3

4

DDE

TX

A

RX

1

B

RE

2

6

X2-4

7

X2-3

X2-1

GND

Fig. 13.6. Adding the RS485 interface circuit to the AVR development board

Table 13.1. Connections between the RS485 interface circuit and the MCU

Signal name

MCU pin

SN75176

X2

DE

16

2, 4

TX

15

3

RX

14

1

GND

11

5

X2-1

VCC

10

8

A

6

X2-4

B

7

X2-3

The purpose of the modification is to add a SN75176 circuit, which implements the RS485 interface, and the X2 connector in the custom area of the development board. These components must be connected to the MCU according to Table 13.1.

With the RS485 interface, the development board is capable of emulating all the functions of the SLD and SLA modules described above.

13.3 The Software

The principles of a simple master–slave network protocol have been described in Chap. 3. The following paragraphs contain an example of the implementation of a simple microcontroller network based on these principles.

13.3.1 Description of the Communication Protocol

The devices connected to the RS485 bus communicate according to the following set of rules:

Communication data consists of fixed-length packets, having a predetermined structure.

All the information in the data packets is ASCII encoded.

All data transfers are initiated by the master device, which sends interrogation or command packets to specific slave devices.

All slave devices are identified by a unique address.