Файл: The quintessential PIC microcontroller (S. Katzen, 2000).pdf

408 The Quintessential PIC Microcontroller

synonymously for bit 2. At this point the content of ADRES is the result of the conversion.

Rather than polling for completion, the end of conversion can be used to generate an interrupt. In particular if a conversion is to be done in the Sleep mode then this interrupt can be used to awaken the device.

(a) PIC16C71 interrupt control

7 6 5 4 3 2 1 0

Peripheral Interrupt Enable 1

(b) PIC16C73/4 interrupt control

Fig. 14.10 Interrupt control for the ADC module.

The procedure in obtaining a digitized outcome using the ADC interrupt is similar to the polling technique.

1.Configure ADC module (see Table 14.3).

2.Configure ADC interrupt.

• Set the ADIE local mask bit to enable the ADC module interrupt.

14. Take the Rough with the Smooth 409

•Clear the ADIF flag bit.

•Set the PEIE auxillary peripheral interrupt group mask bit (not the PIC16C71X line).

•Set the GIE bit to globally enable all interrupts.

3.Wait for the required acquisition time, typically 12 µs.

4.Start conversion by setting the GO/DONE bit.

5.Continue ……until interrupted.

6.Interrupt service routine (ISR) checks ADIF bit and if set reads the ADRES register and clears the ADIF bit.

7.For next conversion go to Step 2 or 3 as required.

To illustrate the process consider an interrupt-driven equivalent to the subroutine of Program 14.1, where we wish to action the digitization of the analog voltage at channel n. There are three considerations for this situation.

•Initialization code.

•The conversion subroutine.

•The interrupt service routine.

The initialization code depends a little on the target PIC device. The 18-pin footprint PIC16C71X line has a 4-channel ADC module as the counterpart to the PIC16F83/4’s Data EEPROM module. This can be seen by comparing the INTerrupt CONtrol register of the latter in Fig. 14.10(a) with the former shown in Fig. 7.4 on page 178. Here the ADC module’s Interrupt Enable mask bit ADIE replaces the EEIE mask as INTCON[6] and the ADC module’s Interrupt Flag is located as ADCON0[1] (see Fig. 14.8).

The PIC16C73/4 28/40-pin line has a much larger line-up of peripheral devices and use two pairs of additional registers to service these auxillary8 interrupt mask and flag bits. These Interrupt registers are called the Peripheral Interrupt and Peripheral Interrupt Enable registers. PIR1 and PIE1 are shown in Fig. 14.10(b). The former at File 0Ch holds eight interrupt flags, including ADIF at PIR1[6]. The latter at File 8Ch holds the corresponding mask bits. There is also a PIR2/PIE2 pair at File 0Dh:8Dh. Both these register pairs are enabled as a group by the PEIE (PEripheral Interrupt Enable) bit which takes the place of the single mask bit in INTCON[6] in the 18-pin footprint devices. Thus in enabling the ADC module for interrupt handling, the programmer has to enable both the ADIE local and the PEIE group masks.

In our example, we assume a PIC16C74 target device. Then our initialization code might be:

8That is, apart from the standard external INT, Port B Change and Timer 0 interrupt sources.

14. Take the Rough with the Smooth 411

Program 14.3 The ISR for our interrupt-driven ADC software.

; **********************************************************

;**********************************************************

;First save context

; ************************************************************

; ************************************************************

The core of the ISR is sandwiched by code to save and restore the Working and Status registers as described in Program 7.2 on page 183. As the PIR1 register is available in both Banks 0 & 1, the more complex context saving code illustated in Program 7.4 on page 191 is not required.

The ADC module can operate when the PIC is in its Sleep state. Indeed, a conversion during the (electrical) peace and quiet of sleep may well be preferrable than normal operation. When the ADC internal CR clock is used to sequence the analog module because the system clock is too low, then Sleep conversion is recommended as the CR and system clock are not synchronized and clock feed-through noise is a problem.

The following task list outlines the Sleep state conversion process.

•The ADC clock source must be set to CR, ADCS1:0 = 11.

•The ADIF flag must be cleared to prevent an immediate interrupt.

•The ADIE mask bit must be set to enable the ADC interrupt to awaken the processor.

•The GIE mask bit mask bit must be 0 unless the programmer wishes the processor to jump to an ISR when it awakens.

•The GO/DONE bit in the ADCON0 register must be cleared to initialize the conversion followed immediately by the sleep instruction.

•On awakening, the ADRES holds the digitized value.

Program 14.4 shows a Sleep state conversion, assuming that initialization code similar to the following has been executed.

412 The Quintessential PIC Microcontroller

This code shows the PIC16C71 as the target processor with its two PFCG1:0 bits set up to configure RA1:0 as analog inputs. The internal CR ADC module’s oscillator has been chosen as the clock source and ADC Interrupt flag ADIF (in the iNTCON register for the PIC16C71X line) cleared. Setting ADIE enables the ADC module’s interrupt system. Where applicable the PEIE mask bit at INTCON[6] must also be set. If these are not enabled, then entering the Sleep state will turn o the ADC module in the normal Sleep manner, although the ADON bit reamins 1, and the conversion is aborted. This will also occur if the CR clock option was not choosen.

Program 14.4 Digitizing Channel 1 of a PIC16C71 device.

Program 14.4 shows a conversion being implemented from Channel 1 (CHS1:0 = 01). After the channel has been set up and time allowed for settling9 the GO/DONE bit is cleared to start the conversion process. Where the CR oscillator option has been choosen, there is a 1-instruction cycle delay inserted to allow for the following sleep instruction to close down the processor.

After the PIC has awakened, the ADIF can be cleared and the digitized value read from the ADRES register.

As was the case for the other peripheral devices described in earlier chapters, C code may be used to interact with the ADC module. The

9If the main oscillator is low frequency, one or two nop instructions may be all that is needed. If the channel has not been changed and su cient time has elapsed since the last conversion, then no extra delay is needed.