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42 3 Using the Asynchronous Serial Interface

3.9 Hardware Interfaces for Serial Communication

The asynchronous serial interface has been created to allow connection between digital devices over relatively long distances. The problem is that, as the distance increases, the effect of parasite capacitance and inductance of the cables becomes more important, and the electromagnetic interference grows stronger. As a consequence, the signals transmitted in this way are distorted and attenuated to such an extent that the information carried by the signals cannot be extracted at the receiver.

To overcome the perturbing effect of long connection cables, several methods of processing the electrical signals have been developed. Before transmission, the signals are transformed by special interfaces, in order to increase their overall immunity to perturbations. This section describes three such interfaces.

3.9.1 The RS232 Interface

RS is an abbreviation for Recommended Standard. The recommendation comes from the Electronics Industry Association (EIA), which proposed in 1969 the RS232 standard, aiming to bring order in the multitude of technical solutions to the problems of serial communication.

The main characteristic of RS232 is that the signals are carried as single voltages, referred to a common ground. The voltage levels associated with the logic levels 0 and 1 are as follows:

For logic 0, the voltage on the communication line must be in the range +6 V to +15 V.

For logic 1, the voltage must be in the range −6 V to −15 V.

In practice, the transmission devices generate ±12 V. The receiving devices accept as logic 0 any signal ranging from +3 V to +15 V, and as logic 1 any signal with the amplitude in the range −3 V to −15 V.

A number of special RS232 interface circuits have been developed. One very popular circuit with this function is MAX232, from Maxim Semiconductors. This contains two RS232 transmitters and two RS232 receivers in the same package. The major advantage of this circuit is that it uses an internal oscillator and four external capacitors to generate the ±12 V power supply sources, starting from a single +5 V

Fig. 3.6. A typical RS232 interface circuit MAX232

RxD

+5V

Rx232 +12V

-12V

Fig. 3.7. Waveforms illustrating the level conversion performed by MAX232

power supply. Most of the projects described in this book use this circuit. The schematic of an RS232 interface using MAX232 is shown in Fig. 3.6.

Figure 3.7 shows the waveforms of a signal before and after the MAX232 driver.

3.9.2 Differential Communication. The Interfaces RS422 and RS485

The RS232 interface guarantees safe transmission up to a distance of 15 meters, at a maximum communication speed of 19 200 baud. In practice, these limits are often exceeded, but the overall reliability of the communication system drops. For longer distances, and higher communication speed, a different interface is required.

The interfaces RS422 and RS485 use two conductors to transmit each digital signal, the logic levels being defined by the relative difference of potential between the two conductors. The transmitter’s line driver controls the voltage levels on the two conductors, so that the difference of potential between them is positive for logic 1 and negative for logic 0, as illustrated in Fig. 3.8. This type of transmission is called differential.

The advantage of the differential interface is that the electromagnetic interference and the ground potential differences appear as common mode voltage for the receiver, and they are rejected. This creates a much better immunity to perturbations and allows communication speeds up to 10 Mb per second and cable length up to 1200 meters, using twisted pair cable. The receiver requires at least 200 mV differential input signal in order to reconstruct the original signal.

X

A

XA

B

B

Fig. 3.8. Waveforms for differential transmission

44 3 Using the Asynchronous Serial Interface

Fig. 3.9. Typical RS422/RS485 transceiver circuit

Both the RS422 and RS485 interfaces use differential communication. The difference is that RS422 is designed for point-to-point communication. Only one transmitter and up to 10 receivers may be connected on a conductor pair, in a simplex transmission. RS485 allows multipoint communication, i. e. up to 32 transmitters/receivers may be connected on a conductor pair, in a half-duplex communication. Therefore, the RS485 transmitters must be able to drive their outputs into a high-impedance status, allowing other transmitters to control the communication line. Note that the RS485 standard defines only the electrical characteristics of the signals and devices, and not the rules for accessing the RS485 bus, i. e. the communication protocol.

A typical RS422/RS485 circuit is SN 75176. The functional block diagram of this circuit is shown in Fig. 3.9.

This circuit contains in the same capsule one differential transmitter, and one differential receiver, having individual enable inputs: DE (Driver Enable) active HIGH, and RE\backslash(Receiver Enable) active LOW. When DE = 0, the outputs A, B are in a high impedance status, thus the transmitter is virtually disconnected from the communication line, leaving the control of the line to other similar devices.

3.9.3 The Current Loop Interface

When the length of the communication line is higher than 1 km, or in harsh industrial environments, where galvanic isolation between the transmitter and the receiver is essential, it is possible to use the interface presented in Fig. 3.10.

Fig. 3.10. Current loop transmission circuit

The current generated by I0 closes to the ground either through the transistor T1, when this is saturated, or through the LED of the optocoupler OK1, when T1 is blocked. As a consequence, the waveform of the signal in the collector of the optocoupler’s transistor reproduces the TxD signal. Such a circuit can be used for point-to-point communication systems to transmit data at 9600 bps, over cables a few kilometers long.

3.10 Basic Principles of Networking with Microcontrollers, Using the Asynchronous Serial Interface

A microcontroller-based device can be connected to a network if, at the hardware level, it possesses a communication interface which allows multipoint communication, and, at the software level, is programmed to observe a set of rules concerning the access to the communication channel. This set of rules defines the network communication protocol.

From the hardware point of view, the most common solution used to implement microcontroller-based networks uses the RS485 differential communication interface.

At the software level, a multitude of protocols has been developed, most of them being structured as MASTER–SLAVE protocols. In a MASTER–SLAVE structured network, a single device, called the MASTER, initiates all data transfers on the communication bus. Each SLAVE device has a unique identification code, or address. The MASTER device starts the communication by sending data packets that are received and decoded by all SLAVE devices. Only one SLAVE is authorized to answer the query – the one that recognizes its own address in the data packet received.

The general structure of data packets transferred in a network is given below:

The fields Header and Tail are predefined sequences that define the beginning and the end of the packet. The body of the packet must contain the address of the destination slave device, the operation code, and, of course, a data field. The CRC field is a checksum used to detect communication errors, as described in Sect. 3.3. Assuming that all the bytes in the packet are ASCII codes, then the Header and Tail fields can be reduced to a single byte, e. g. STX (Start of Text – $02) for the header, and EOT (End of Text+– $04) for the tail.

Example Design a simple communication protocol for a microcontroller network comprising one MASTER device and up to 10 slave devices. Each slave device must be able to report the status of two digital inputs, and to change the status of two digital outputs, by executing specific commands from the master device.

Solution To match these requirements, the structure of the body of the packets sent by MASTER may be the following:

where it reaches RTI without reading SCDR. As a consequence, the flag that generated the interrupt is NOT cleared, and a new interrupt is generated right after RTI.

Remember that any interrupt service routine must clear the condition that generated the interrupt.

SX 3.2

What is the main difference between the RS422 and RS485 interfaces?

Solution

Both RS422 and RS485 are designed for differential communication. The main difference between the two standards is that RS422 is aimed at point-to-point communication, where only one transmitter is connected to the communication line.

RS485 is intended for multipoint communication where more than one transmitter is allowed to access the serial bus. Therefore, the RS485 line drivers must be able to go to a high impedance status.

Normally the RS485 interface circuits can be used to implement RS422 point-to- point communication by simply keeping the transmission driver permanently active.

SX 3.3

Draw the schematic of an RS422 full duplex communication line, using the SN75176 circuit, described in Sect. 3.9.2.

Solution

In full duplex communication it is possible to receive a character during the transmission of another. For this to be possible, the transmission and reception lines must be physically distinct. In case of differential communication, two conductors are required for transmission and two others for reception.

Fig. 3.11. Implementation of a full duplex RS422 communication line using SN75176

4

Using the Synchronous Serial Interface SPI

4.1 In this Chapter

This chapter contains a detailed description of the SPI of HC11 and AVR microcontrollers, with hardware and software applications examples.

4.2 General Description of the SPI

As mentioned in Chap. 3, in synchronous serial communication, both the transmitter and receiver use the same synchronization clock to transfer data. Therefore, the device that generates the transmission clock fully controls the moment and the speed of the transmission, and it is called the MASTER.

The HC11 and AVR families of microcontrollers include a synchronous serial interface, called the Serial Peripheral Interface (SPI), allowing operation either in MASTER mode or in SLAVE mode. The general block diagram of a SPI link is presented in Fig. 4.1.

Four shift registers are involved in this link. All work with the same shift clock, generated by the MASTER device. The transmission and reception processes occur simultaneously. Two data line are provided to this purpose: MOSI – (MASTER Out SLAVE In) and MISO (MASTER In SLAVE Out).

Fig. 4.1. General block diagram of a SPI link